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Montiel Nelson, Juan Antonio

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Title Issue Date
Fast feedthrough logic: A high performance logic family for GaAs Nooshabadi, Saeid; Montiel-Nelson, Juan A. Issued date: 2004 DOI: 10.1109/TCSI.2004.836840 Source: IEEE Transactions on Circuits and Systems I: Regular Papers[ISSN 1057-7122],v. 51, p. 2189-2203 JCR: 0,933 - Q2 Artículo
Multiplexer model for RTL satisfiability using MILP Navarro Botello,Héctor ; Montiel-Nelson, J. A. ; Sosa, J. ; García, J. C. ; Fay, D. Q M Issued date: 2004 DOI: 10.1049/el:20040304 Source: Electronics Letters[ISSN 0013-5194],v. 40, p. 417-418 SJR: 0,83 - Q1 JCR: 0,968 - Q2 SCIE Artículo
A macromodel for exact computation of propagation delay time in GaAs and CMOS technologies García, José C.; Montiel-Nelson, Juan A. ; Sosa, J. ; Navarro, Héctor; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498586 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 434-444 Actas de congresos
High-performance VLSI architecture for video processing Navarro, Héctor; Montiel-Nelson, Juan A. ; Sosa, Javier ; García, José C.; Sarmiento, R. , et al Issued date: 2003 DOI: 10.1117/12.498585 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 175-186 Actas de congresos
VESTA: A system level verification environment based on C++ Shahdadpuri, Mahendra; Sosa, J. ; Navarro, Héctor; Montiel-Nelson, Juan A. ; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498618 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 209-219 Actas de congresos
System-level verification methodology for advanced switch fabrics Sosa, J. ; Montiel-Nelson, Juan A. ; Navarro, Héctor; Shahdadpuri, Mahendra; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498612 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 187-198 Actas de congresos
ATM over SDH: Design of a STM-16c transceiver using GaAs technology Tubío, O.; Esper-Chaín, R. ; González, F.; Tobajas, F. ; De Armas Sosa, Valentín , et al Issued date: 2002 DOI: 10.1016/S0026-2692(02)00115-5 Source: Microelectronics Journal[ISSN 0026-2692],v. 33, p. 1097-1105 JCR: 0,457 - Q3 SCIE Artículo
Efficient computation of the areapower consumption versus delay tradeoff curve for circuit critical path optimization Sosa González, Carlos Javier ; Montiel-Nelson, J. A. ; Nooshabadi, S. Issued date: 2001 Source: ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings,v. 5 (922101), p. 527-530 Actas de congresos
A compact layout technique for reducing switching current effects in high speed circuits Montiel-Nelson, J. A. ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio Issued date: 2001 DOI: 10.1109/ISQED.2001.915231 Source: Proceedings - International Symposium on Quality Electronic Design, ISQED [ISSN 1948-3287], v. 2001-January (915231), p. 223-228 Actas de congresos
A compact layout technique to minimize high frequency switching effects in high speed circuits Montiel-Nelson, Juan A. ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio ; Nooshabadi, S. Issued date: 2001 DOI: 10.1109/ISCAS.2001.922179 Source: ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings,v. 4 (922179), p. 96-99 Actas de congresos
RME: Red Multi-LAN Experimental para Contenidos Multimedia Montiel Nelson, Juan Antonio Issued date: 2000 Source: BIT. Boletín informativo de telecomunicación [ISSN 0210-3923], n. 124, p. 74-75 Artículo
A single phase latch for high speed GaAs domino circuits Nooshabadi, S.; Montiel-Nelson, J. A. ; Núñez, A. ; Sarmiento, R. ; Sosa González, Carlos Javier Issued date: 2000 DOI: 10.1109/DATE.2000.840893 Source: Proceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (840893), p. 760 Actas de congresos
Circuit partitioning using evolution algorithms Montiel-Nelson, J. A. ; Winter Althaus, Gabriel ; Martínez, L.; Greiner Sánchez, David Juan Issued date: 1999 Source: Evolutionary algorithms in engineering and computer science: recent advances in genetic algorithms, evolution strategies, evolutionary programmin, genetic programming and industrial applications / K. Miettinen, Pekka Neittaanmäki, M. M. Mäkelä, Jacques Périaux (Eds.). ISBN: 978-0-471-99902-7, April 1999 itemlist.container.dc.description.spiq Q1 Capítulo de libro
High speed GaAs subsystem design using feed through logic Montiel Nelson, Juan Antonio ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio ; Nooshabadi, S. Issued date: 1999 DOI: 10.1109/DATE.1999.761174 Source: Proceedings - Design, Automation, and Test in Europe Conference and Exhibition [ISSN 1530-1591] (761174), p. 509-513 Actas de congresos
OLYMPO: A GaAs compiler for VLSI design Montiel-Nelson, J. A. ; de Armas, V. ; Sarmiento, R. ; Nunez, A. Issued date: 1998 Source: Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,v. 3, p. 385-388 Artículo
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology Sarmiento, R ; Tobajas, Félix ; De Armas Sosa, Valentín ; Esper-Chaín, Roberto ; López Feliciano, José Francisco , et al Issued date: 1998 DOI: 10.1109/92.661241 Source: Ieee Transactions On Very Large Scale Integration (Vlsi) Systems[ISSN 1063-8210],v. 6 (1), p. 18-30 JCR: 0,733 - Q1 SCIE Artículo
600 MHz 2D-DCT processor for MPEG applications Sarmiento, R. ; Pulido, C.; Tobajas, F. ; De Armas Sosa, Valentín ; Esper-Chain, R. , et al Issued date: 1998 Source: Conference Record of the Asilomar Conference on Signals, Systems and Computers[ISSN 1058-6393],v. 2, p. 1527-1531 Actas de congresos
A cell and macrocell compiler for GaAs VLSI full-custom design Montiel-Nelson, J. A. ; De Armas, V.; Sarmiento, R. ; Nunez, A. Issued date: 1998 DOI: 10.1109/DATE.1998.655982 Source: Proceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (655982), p. 947-948 Actas de congresos
Micropipeline architecture for multiplier-less FIR filters Nooshabadi, S.; Montiel-Nelson, J. A. ; Visweswaran, G. S.; Nagchoudhurhi, D. Issued date: 1997 Source: Proceedings of the IEEE International Conference on VLSI Design, p. 451-456 Actas de congresos
Fast feed through logic (FTL): a gallium arsenide-based fast logic Nooshabadi, S.; Montiel-Nelson, J. A. ; Eshraghian, K. Issued date: 1997 Source: Proceedings of the Australian Microelectronics Conference, p. 61-64 Actas de congresos