|Title:||Multiplexer model for RTL satisfiability using MILP||Authors:||Navarro Botello,Héctor
Montiel-Nelson, J. A.
García, J. C.
Fay, D. Q M
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||computability
multiplexing equipment ,
Logic gates, et al
|Issue Date:||2004||Publisher:||0013-5194||Journal:||Electronics letters||Abstract:||New approaches to the satisfiability problem (SAT) for register transfer level (RTL) designs combine arithmetic blocks with Boolean logic to form a mixed integer linear program (MILP). Two-to-one multiplexers with word-level inputs can be decomposed to logic gates, but it is more efficient to describe them in MILP constraints as arithmetic operators. Larger multiplexers are built using a multilevel selection tree. However, such an approach should be improved to optimise the overall efficiency in solving the SAT problem. Proposed is a new MILP model for multiplexers. Experimental results indicate a 50% decrease in the number of constraints and a reduction in MILP complexity from Omega(N-2.4) to Omega(N-1.7), measured in CPU time.||URI:||http://hdl.handle.net/10553/49689||ISSN:||0013-5194||DOI:||10.1049/el:20040304||Source:||Electronics Letters[ISSN 0013-5194],v. 40, p. 417-418|
|Appears in Collections:||Artículos|
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