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Montiel Nelson, Juan Antonio

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Title Issue Date
Statistically optimized VLSI architecture for buffer for EBCOT in JPEG2000 encoder Gupta, Amit Kumar; Nooshabadi, Saeid; Montiel-Nelson, Juan Issued date: 2005 DOI: 10.1117/12.608585 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5837 PART I (23), p. 185-192 Actas de congresos
A single capacitor bootstrapped power efficient CMOS driver García, José C. ; Montiel-Nelson, Juan A. ; Nooshabadi, Saeid Issued date: 2005 DOI: 10.1109/MWSCAS.2005.1594095 Source: Midwest Symposium on Circuits and Systems[ISSN 1548-3746],v. 2005 (1594095), p. 287-290 Actas de congresos
Efficient method to obtain the entire active area against circuit delay time trade-off curve in gate sizing Montiel-Nelson, J. A. ; Sosa, J. ; Navarro, H.; Sarmiento, R. ; Núñez, A. Issued date: 2005 DOI: 10.1049/ip-cds:20040779 Source: IEE Proceedings: Circuits, Devices and Systems[ISSN 1350-2409],v. 152, p. 133-145 JCR: 0,638 - Q3 Actas de congresos
Functional vector generation for combinational circuits based on data path coverage metric and mixed integer linear programming Montiel-Nelson, Juan A. ; Navarro Botello,Héctor ; García, José C. ; Sosa González, Carlos Javier Issued date: 2004 DOI: 10.1109/ISQED.2004.1283676 Source: Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004, p. 217-222 Actas de congresos
A direct bootstrapped CMOS large capacitive-load driver circuit García, José C. ; Montiel-Nelson, Juan A. ; Navarro Botello,Héctor ; Sosa, J Issued date: 2004 Source: Proceedings - Design, Automation and Test in Europe Conference and Exhibition,v. 1, p. 680-681 Actas de congresos
VESTA: A system level verification environment based on C++ Shahdadpuri, Mahendra; Sosa, J. ; Navarro, Héctor; Montiel-Nelson, Juan A. ; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498618 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 209-219 Actas de congresos
High-performance VLSI architecture for video processing Navarro, Héctor; Montiel-Nelson, Juan A. ; Sosa, Javier ; García, José C.; Sarmiento, R. , et al Issued date: 2003 DOI: 10.1117/12.498585 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 175-186 Actas de congresos
System-level verification methodology for advanced switch fabrics Sosa, J. ; Montiel-Nelson, Juan A. ; Navarro, Héctor; Shahdadpuri, Mahendra; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498612 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 187-198 Actas de congresos
A macromodel for exact computation of propagation delay time in GaAs and CMOS technologies García, José C.; Montiel-Nelson, Juan A. ; Sosa, J. ; Navarro, Héctor; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498586 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 434-444 Actas de congresos
Efficient computation of the areapower consumption versus delay tradeoff curve for circuit critical path optimization Sosa González, Carlos Javier ; Montiel-Nelson, J. A. ; Nooshabadi, S. Issued date: 2001 Source: ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings,v. 5 (922101), p. 527-530 Actas de congresos
A compact layout technique to minimize high frequency switching effects in high speed circuits Montiel-Nelson, Juan A. ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio ; Nooshabadi, S. Issued date: 2001 DOI: 10.1109/ISCAS.2001.922179 Source: ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings,v. 4 (922179), p. 96-99 Actas de congresos
A compact layout technique for reducing switching current effects in high speed circuits Montiel-Nelson, J. A. ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio Issued date: 2001 DOI: 10.1109/ISQED.2001.915231 Source: Proceedings - International Symposium on Quality Electronic Design, ISQED [ISSN 1948-3287], v. 2001-January (915231), p. 223-228 Actas de congresos
A single phase latch for high speed GaAs domino circuits Nooshabadi, S.; Montiel-Nelson, J. A. ; Núñez, A. ; Sarmiento, R. ; Sosa González, Carlos Javier Issued date: 2000 DOI: 10.1109/DATE.2000.840893 Source: Proceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (840893), p. 760 Actas de congresos
Circuit partitioning using evolution algorithms Montiel-Nelson, J. A. ; Winter Althaus, Gabriel ; Martínez, L.; Greiner Sánchez, David Juan Issued date: 1999 Source: Evolutionary algorithms in engineering and computer science: recent advances in genetic algorithms, evolution strategies, evolutionary programmin, genetic programming and industrial applications / K. Miettinen, Pekka Neittaanmäki, M. M. Mäkelä, Jacques Périaux (Eds.). ISBN: 978-0-471-99902-7, p. 471-483, April 1999 itemlist.container.dc.description.spiq Q1 Capítulo de libro
High speed GaAs subsystem design using feed through logic Montiel Nelson, Juan Antonio ; De Armas Sosa, Valentín ; Sarmiento Rodríguez, Roberto ; Núñez Ordóñez, Antonio ; Nooshabadi, S. Issued date: 1999 DOI: 10.1109/DATE.1999.761174 Source: Proceedings - Design, Automation, and Test in Europe Conference and Exhibition [ISSN 1530-1591] (761174), p. 509-513 Actas de congresos
600 MHz 2D-DCT processor for MPEG applications Sarmiento, R. ; Pulido, C.; Tobajas, F. ; De Armas Sosa, Valentín ; Esper-Chain, R. , et al Issued date: 1998 Source: Conference Record of the Asilomar Conference on Signals, Systems and Computers[ISSN 1058-6393],v. 2, p. 1527-1531 Actas de congresos
A cell and macrocell compiler for GaAs VLSI full-custom design Montiel-Nelson, J. A. ; De Armas, V.; Sarmiento, R. ; Nunez, A. Issued date: 1998 DOI: 10.1109/DATE.1998.655982 Source: Proceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (655982), p. 947-948 Actas de congresos
Fast feed through logic (FTL): a gallium arsenide-based fast logic Nooshabadi, S.; Montiel-Nelson, J. A. ; Eshraghian, K. Issued date: 1997 Source: Proceedings of the Australian Microelectronics Conference, p. 61-64 Actas de congresos
Gallium arsenide based fast feed through logic (FTL) Montiel-Nelson, Juan A. ; Nooshabadi, Saeid; Eshraghian, Kamran Issued date: 1997 Source: Proceedings - IEEE International Symposium on Circuits and Systems[ISSN 0271-4310],v. 3, p. 1884-1887 Actas de congresos
Micropipeline architecture for multiplier-less FIR filters Nooshabadi, S.; Montiel-Nelson, J. A. ; Visweswaran, G. S.; Nagchoudhurhi, D. Issued date: 1997 Source: Proceedings of the IEEE International Conference on VLSI Design, p. 451-456 Actas de congresos