|Title:||Gallium arsenide based fast feed through logic (FTL)||Authors:||Montiel-Nelson, Juan A.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||Gallium arsenide
Logic devices, et al
|Issue Date:||1997||Journal:||Proceedings - IEEE International Symposium on Circuits and Systems||Conference:||Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4)||Abstract:||A GaAs logic family using the feed through evaluation concept is presented. The logic outputs reset to low during the high phase of the clock and evaluate during the low phase of the clock. Resetting to low alleviates the problems of charge-sharing and leakage current associated with other GaAs dynamic logic families. This novel concept is compared with other common GaAs logic circuits in terms of, device count, chip area, delay, clock rate and power consumption.||URI:||http://hdl.handle.net/10553/49697||ISBN:||0-7803-3583-X||ISSN:||0271-4310||Source:||Proceedings - IEEE International Symposium on Circuits and Systems[ISSN 0271-4310],v. 3, p. 1884-1887|
|Appears in Collections:||Actas de congresos|
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