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Fernández García, Enrique

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Title Issue Date
ePAPI: performance application programming interface for embedded platforms Giesen, Jeremy; Mezzetti, Enrico; Abella, Jaume; Fernández, Enrique ; Cazorla, Francisco J. Issued date: 2019 DOI: 10.4230/OASIcs.WCET.2019.3 Source: 19th International Workshop on Worst-Case Execution Time Analysis (WCET 2019) Actas de congresos
Data uncertainty management in path planning for underwater ocean gliders Hernández, Daniel ; Adler,; Isern, J. ; Cabrera, J. ; Dominguez, A. , et al Issued date: 2014 DOI: 10.1109/OCEANS-TAIPEI.2014.6964498 Actas de congresos
Multi-task active-vision in robotics Cabrera Gámez, Jorge ; Curbelo Hernández, David ; Domínguez Brito, Antonio Carlos ; Fernández García, Enrique Issued date: 2010 DOI: 10.5772/9308 Capítulo de libro
LPA: a first approach to the loop processor architecture García, Alejandro; Santana Jaria, Oliverio Jesús ; Fernández García, Enrique ; Medina Rodríguez, Pedro ; Valero, Mateo Issued date: 2008 DOI: 10.1007/978-3-540-77560-7_19 Source: Stenström P., Dubois M., Katevenis M., Gupta R., Ungerer T. (eds) High Performance Embedded Architectures and Compilers. HiPEAC 2008. Lecture Notes in Computer Science, vol 4917. Springer, Berlin, Heidelberg Actas de congresos
FAME: FAirly MEasuring multithreaded architectures Vera, Javier; Cazorla, Francisco J.; Pajuelo, Alex; Santana, Oliverio J. ; Fernández, Enrique , et al Issued date: 2007 DOI: 10.1109/PACT.2007.4336221 Source: Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT [ISSN 1089-795X], n. 4336221, p. 305-316 Actas de congresos
Measuring the performance of multithreaded processors Vera, Javier; Cazorla, Francisco J.; Pajuelo, Alex; Santana, Oliverio J. ; Fernandez, Enrique , et al Issued date: 2007 Source: 2007 SPEC Benchmark Workshop Actas de congresos
On the problem of minimizing workload execution time in SMT processors Cazorla, Francisco J.; Fernández, Enrique ; Knijnenburg, Peter M.W.; Ramirez, Alex; Sakellariou, Rizos, et al Issued date: 2007 DOI: 10.1109/ICSAMOS.2007.4285735 Source: Proceedings - 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2007, p. 66-73, (Diciembre 2007) Actas de congresos
Predictable performance in SMT processors: synergy between the OS and SMTs Cazorla, Francisco J.; Knijnenburg, Peter M. W.; Sakellariou, Rizos; Fernandez, Enrique ; Ramirez, Alex, et al Issued date: 2006 DOI: 10.1109/TC.2006.108 Source: IEEE Transactions On Computers [ISSN 0018-9340], v. 55 (7), p. 785-799, (Julio 2006) JCR: 1,426 - Q1 SCIE Artículo
Architectural support for real-time task scheduling in SMT processors Cazorla, Francisco J.; Fernández, Enrique ; Knijnenburg, Peter M.W.; Ramirez, Alex; Sakellariou, Rizos, et al Issued date: 2005 DOI: 10.1145/1086297.1086320 Source: CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, p. 166-176, (Diciembre 2005) Actas de congresos
Feasibility of QoS for SMT Cazorla, FJ; Knijnenburg, PMW; Sakellariou, R; Fernández, E. ; Ramirez, A, et al Issued date: 2004 DOI: 10.1007/978-3-540-27866-5_70 Source: Danelutto M., Vanneschi M., Laforenza D. (eds) / Euro-Par 2004 Parallel Processing. Lecture Notes in Computer Science, [ISSN 0302-9743], vol 3149, p. 535-540, (2004). Springer, Berlin, Heidelberg. (2004) JCR: 0,513 - Q4 Actas de congresos
Implicit vs. explicit resource allocation in SMT processors Cazorla, Francisco J.; Knijnenburg, Peter M.W.; Sakellariou, Rizos; Fernandez, Enrique ; Ramirez, Alex, et al Issued date: 2004 DOI: 10.1109/DSD.2004.1333257 Source: Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004, p. 44-51, (Diciembre 2004) Actas de congresos
Dynamically controlled resource allocation in SMT processors Cazorla, Francisco J.; Ramirez, Alex; Valero, Mateo; Fernández, Enrique Issued date: 2004 DOI: 10.1109/MICRO.2004.17 Source: Proceedings of the Annual International Symposium on Microarchitecture, MICRO, p. 171-182, (Diciembre 2004) Actas de congresos
QoS for high-performance smt processors in embedded systems Cazorla, FJ; Ramirez, A; Valero, M; Knijnenburg, PMW; Sakellariou, R, et al Issued date: 2004 DOI: 10.1109/MM.2004.37 Source: Ieee Micro [ISSN 0272-1732], v. 24 (4), p. 24-31, (Julio-Agosto 2004) JCR: 1,19 - Q1 SCIE Artículo
Enabling SMT for real-time embedded systems Cazorla, F. J.; Knijnenburg, P. M.W.; Sakellariou, R.; Fernández, E. ; Ramirez, A., et al Issued date: 2004 Source: European Signal Processing Conference [ISSN 2219-5491], v. 06-10-September-2004, p. 1341-1344, (Abril 2015) Actas de congresos
Optimising long-latency-load-aware fetch policies for SMT processors Cazorla, Francisco J.; Ramirez, Alex; Valero, Mateo; Fernandez, Enrique Issued date: 2004 DOI: 10.1504/IJHPCN.2004.009267 Source: International Journal of High Performance Computing and Networking [ISSN 1740-0562], v. 2 (1), p. 45-54, (Enero 2004) Artículo
DCache warn: an I-fetch policy to increase SMT efficiency Cazorla Almeida, Francisco Javier; Ramírez Bellido, Alejandro; Valero Cortés, Mateo; Fernández García, Enrique Issued date: 2004 DOI: 10.1109/IPDPS.2004.1303005 Source: Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)[ISBN 0769521320], v. 18, p. 1037-1046, 2004 Actas de congresos
Predictable performance in SMT processors Cazorla, Francisco J.; Fernández, Enrique ; Knijnenburg, Peter M.W.; Ramirez, Alex; Sakellariou, Rizos, et al Issued date: 2004 DOI: 10.1145/977091.977152 Source: 2004 Proceedings of the First Computing Frontiers Conference on Computing Frontiers, p. 433-443, (Agosto 2004) Actas de congresos
Improving memory latency aware fetch policies for SMT processors Cazorla, Francisco J.; Fernández García, Enrique ; Ramírez, Alex; Valero, Mateo Issued date: 2003 Source: High Performance Computing. ISHPC 2003. Lecture Notes in Computer Science [ISSN 0302-9743], v. 2858, p. 70-85, (2003) Actas de congresos
Studying new ways for improving adaptive history length branch predictors Falcón, Ayose; Santana Jaria, Oliverio Jesús ; Medina Rodríguez, Pedro ; Fernández García, Enrique ; Ramírez, Alex, et al Issued date: 2002 DOI: 10.1007/3-540-47847-7_23 Source: Zima H.P., Joe K., Sato M., Seo Y., Shimasaki M. (eds) High Performance Computing. ISHPC 2002. Lecture Notes in Computer Science, vol 2327. Springer, Berlin, Heidelberg JCR: 0,515 - Q3 Actas de congresos
On board system model for road intelligent transport system García Rodríguez, Carmelo Rubén ; Alayón Hernández, Francisco Javier ; Fernández García, Enrique ; Medina Rodríguez, Pedro Issued date: 2002 DOI: 10.2495/UT020211 Source: Advances in Transport [ISSN 1462-608X], p. 213-219, (Diciembre 2002) Actas de congresos