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Sosa González, Carlos Javier

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Title Issue Date
Bootstrapped adiabatic complementary pass-transistor logic driver circuit for large capacitive load and low-energy applications García, José C. ; Montiel-Nelson, Juan A. ; Sosa, J. ; Navarro, Héctor; Nooshabadi, Saeid Issued date: 2009 DOI: 10.1109/DSD.2009.179 Source: 12th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2009 (5350093), p. 196-199 Actas de congresos
Power delay tradeoff using the genetic algorithm Sosa González, Carlos Javier ; Montiel-Nelson, Juan A. ; Nooshabadi, Saeid Issued date: 2009 DOI: 10.1109/ISCIT.2009.5341062 Source: 2009 9th International Symposium on Communications and Information Technology, ISCIT 2009 (5341062), p. 1344-1347 Actas de congresos
High performance CMOS symmetric low swing to high swing converter for on-chip interconnects Montiel-Nelson, Juan A. ; Navarro Botello,Héctor ; Sosa González, Carlos Javier ; Nooshabadi, Saeid; Garcia, Jose C. Issued date: 2007 DOI: 10.1109/NEWCAS.2007.4487974 Source: 2007 IEEE North-East Workshop on Circuits and Systems, NEWCAS 2007 (4487974), p. 566-569 Actas de congresos
Movement recognition and strain lecture algorithm for fracture monitoring system Morales-Ramos, R.; Sosa, J. ; Montiel-Nelson, Juan A. ; Zwick, A.; Nguyen, X. P. Issued date: 2006 Source: Proceedings - IEEE International Symposium on Circuits and Systems[ISSN 0271-4310] (1692595), p. 353-356 Actas de congresos
A one-step algorithm for finding the optimum solution of the state justification problem in RTL designs using MILP Navarro Botello,Héctor ; Montiel-Nelson, Juan A. ; Sosa, Javier ; García, José C. Issued date: 2005 DOI: 10.1117/12.608526 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5837 PART II (83), p. 754-763 Actas de congresos
Efficient method to obtain the entire active area against circuit delay time trade-off curve in gate sizing Montiel-Nelson, J. A. ; Sosa, J. ; Navarro, H.; Sarmiento, R. ; Núñez, A. Issued date: 2005 DOI: 10.1049/ip-cds:20040779 Source: IEE Proceedings: Circuits, Devices and Systems[ISSN 1350-2409],v. 152, p. 133-145 JCR: 0,638 - Q3 Actas de congresos
A direct bootstrapped CMOS large capacitive-load driver circuit García, José C. ; Montiel-Nelson, Juan A. ; Navarro Botello,Héctor ; Sosa, J Issued date: 2004 Source: Proceedings - Design, Automation and Test in Europe Conference and Exhibition,v. 1, p. 680-681 Actas de congresos
Functional vector generation for combinational circuits based on data path coverage metric and mixed integer linear programming Montiel-Nelson, Juan A. ; Navarro Botello,Héctor ; García, José C. ; Sosa González, Carlos Javier Issued date: 2004 DOI: 10.1109/ISQED.2004.1283676 Source: Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004, p. 217-222 Actas de congresos
Multiplexer model for RTL satisfiability using MILP Navarro Botello,Héctor ; Montiel-Nelson, J. A. ; Sosa, J. ; García, J. C. ; Fay, D. Q M Issued date: 2004 DOI: 10.1049/el:20040304 Source: Electronics Letters[ISSN 0013-5194],v. 40, p. 417-418 SJR: 0,83 - Q1 JCR: 0,968 - Q2 SCIE Artículo
High-performance VLSI architecture for video processing Navarro, Héctor; Montiel-Nelson, Juan A. ; Sosa, Javier ; García, José C.; Sarmiento, R. , et al Issued date: 2003 DOI: 10.1117/12.498585 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 175-186 Actas de congresos
VESTA: A system level verification environment based on C++ Shahdadpuri, Mahendra; Sosa, J. ; Navarro, Héctor; Montiel-Nelson, Juan A. ; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498618 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 209-219 Actas de congresos
System-level verification methodology for advanced switch fabrics Sosa, J. ; Montiel-Nelson, Juan A. ; Navarro, Héctor; Shahdadpuri, Mahendra; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498612 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 187-198 Actas de congresos
A macromodel for exact computation of propagation delay time in GaAs and CMOS technologies García, José C.; Montiel-Nelson, Juan A. ; Sosa, J. ; Navarro, Héctor; Sarmiento, R. Issued date: 2003 DOI: 10.1117/12.498586 Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 434-444 Actas de congresos
Efficient computation of the areapower consumption versus delay tradeoff curve for circuit critical path optimization Sosa González, Carlos Javier ; Montiel-Nelson, J. A. ; Nooshabadi, S. Issued date: 2001 Source: ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings,v. 5 (922101), p. 527-530 Actas de congresos
A single phase latch for high speed GaAs domino circuits Nooshabadi, S.; Montiel-Nelson, J. A. ; Núñez, A. ; Sarmiento, R. ; Sosa González, Carlos Javier Issued date: 2000 DOI: 10.1109/DATE.2000.840893 Source: Proceedings -Design, Automation and Test in Europe, DATE[ISSN 1530-1591] (840893), p. 760 Actas de congresos

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