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Núñez Ordóñez, Antonio

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Title Issue Date
Sedimentología de las facies detríticas de la unidad intermedia del Mioceno al sur y este de Madrid Lomoschitz, Alejandro ; Calvo, J.P.; Ordóñez, S. Issued date: 1985 Source: Estudios geológicos [ISSN 0367-0449], v. 41 (5-6), p. 343-358 SCIE Artículo
A survey of GaAs computer designs Nuñez, Antonio Issued date: 1987 DOI: 10.1016/0165-6074(87)90104-9 Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 21, p. 665-670 Artículo
Some results in GaAs processor design using LSI integrated circuits Núñez, A. ; Sarmiento, R. ; Carballo, P. P. Issued date: 1989 DOI: 10.1016/0165-6074(89)90184-1 Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 25, p. 127-132 Artículo
MVM: A GaAs microprocessor for critical real-time applications Núñez, Antonio ; Carnal, David Issued date: 1989 DOI: 10.1016/0165-6074(89)90062-8 Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 27, p. 289-298 Artículo
Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation Eshraghian, K.; Sarmiento, R ; Carballo, Pp ; Núñez, A. Issued date: 1991 DOI: 10.1016/0165-6074(91)90326-O Source: Microprocessing And Microprogramming[ISSN 0165-6074],v. 32 (1-5), p. 75-82 Artículo
Accurate extraction of interconnect capacitances by adaptive mixed F.E.M Ferragut, L.; Montenegro, R. ; Winter, G. ; Núñez, A. Issued date: 1991 DOI: 10.1016/0165-6074(91)90324-M Source: Microprocessing and Microprogramming [ISSN 0165-6074],v. 32 (1-5), p. 61-68 Artículo
High-Speed Primitives Of Hardware Accelerators For Dsp In Gaas Technology Sarmiento, R ; Carballo, Pp ; Nunez, A Issued date: 1992 Source: Iee Proceedings-G Circuits Devices And Systems[ISSN 0956-3768],v. 139 (2), p. 205-216 Artículo
Timing Model For Sdcfl Digital Circuits Gomez, L ; Hernandez, A; Nunez, A Issued date: 1992 Source: Microprocessing And Microprogramming[ISSN 0165-6074],v. 34 (1-5), p. 193-196 Artículo
Timimg model for SDCFL digital circuits Gómez, Luis ; Hernández Ballester, Antonio ; Núñez, Antonio Issued date: 1992 DOI: 10.1016/0165-6074(92)90132-Q Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 34, p. 193-196 Artículo
Integer and control units for a GaAs 32-bit RISC processor Carballo, P. P. ; Sarmiento, R. ; Núñez, A. Issued date: 1993 DOI: 10.1016/0165-6074(93)90026-H Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 37, p. 105-108 Artículo
Letter from the short notes editors, Euromicro '92 Núñez, Antonio ; Fay, Don Issued date: 1993 Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 37, p. 5 Comentario
Multiobjective optimization using analytical models of GaAs high-speed digital circuits Gómez, L. ; Hernández Ballester, Antonio ; Nunez, A. Issued date: 1993 DOI: 10.1016/0165-6074(93)90103-R Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 39, p. 267-270 Artículo
Timing analysis for DCFL/SDCFL VLSI circuits Gómez, L. ; Hernández Ballester, Antonio ; Nunez, A. Issued date: 1993 DOI: 10.1016/0165-6074(93)90189-R Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 38, p. 511-518 Artículo
Gallium arsenide pseudo-dynamic latched logic López Feliciano, José ; Eshraghian, K.; Sarmiento, R. ; Núñez, A. Issued date: 1996 DOI: 10.1049/el:19960926 Source: Electronics Letters[ISSN 0013-5194],v. 32, p. 1353-1354 SCIE Artículo
Noise margin enhancement in GaAs ROM's using current mode losic López Feliciano, José Francisco ; Sarmiento, R. ; Eshraghian, K.; Núñez, A. Issued date: 1997 DOI: 10.1109/4.563683 Source: IEEE Journal of Solid-State Circuits[ISSN 0018-9200],v. 32, p. 592-597 JCR: 0,922 - Q1 SCIE Artículo
GaAs pseudodynamic latched logic for high performance processor cores López Feliciano, José Francisco ; Eshraghian, K.; Sarmiento, R. ; Núnez, A. ; Abbott, D. Issued date: 1997 DOI: 10.1109/4.604094 Source: IEEE Journal of Solid-State Circuits[ISSN 0018-9200],v. 32, p. 1297-1303 JCR: 0,922 - Q1 SCIE Artículo
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology Sarmiento, R ; Tobajas, Félix ; De Armas Sosa, Valentín ; Esper-Chaín, Roberto ; López Feliciano, José Francisco , et al Issued date: 1998 DOI: 10.1109/92.661241 Source: Ieee Transactions On Very Large Scale Integration (Vlsi) Systems[ISSN 1063-8210],v. 6 (1), p. 18-30 JCR: 0,733 - Q1 SCIE Artículo
Pipelined GaAs carry lookahead adder López Feliciano, José Francisco ; Reina, R.; Hernández, L.; Tobajas, F. ; De Armas Sosa, Valentín , et al Issued date: 1998 DOI: 10.1049/el:19981239 Source: Electronics Letters[ISSN 0013-5194],v. 34, p. 1732-1733 JCR: 1,152 - Q1 SCIE Artículo
OLYMPO: A GaAs compiler for VLSI design Montiel-Nelson, J. A. ; de Armas, V. ; Sarmiento, R. ; Nunez, A. Issued date: 1998 Source: Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,v. 3, p. 385-388 Artículo
Flexible design of SPARC cores: A quantitative study Bautista, Tomas ; Nunez, Antonio Issued date: 1999 Source: Hardware/Software Codesign - Proceedings of the International Workshop, p. 43-47 Artículo