|Title:||High-Speed Primitives Of Hardware Accelerators For Dsp In Gaas Technology||Authors:||Sarmiento, R
|Keywords:||Design||Issue Date:||1992||Publisher:||0956-3768||Journal:||IEE Proceedings, Part G: Circuits, Devices and Systems||Abstract:||The EUROCHIP initiative is providing foundry access and full support for a variety of technologies including CMOS and BiCMOS. At present, a GaAs foundry has been selected for high-frequency analogue design (MMIC), and some wafers have been processed. However no foundry runs have yet been selected for GaAs digital circuits. A number of European design laboratories are looking forward to that possibility. Certainly there are not many European foundries with suitable processing. Meanwhile, access to GaAs foundries has been set up by an international university consortium. In particular, this work has been done under the research program in GaAs digital circuits design set up by the Centro de Microelectronica Aplicada, of the University of Las Palmas, in collaboration with the Centre for Gallium Arsenide VLSI Technology, University of Adelaide, and the Middlesex Polytechnic of London. We hope that, in the future, EUROCHIP can support this technology. The paper describes work to design a set of basic computational primitives in digital signal processing (DSP) such as registers, adders and multipliers, and explores the influence of layout and design methodology on the performance of these cells. They have been developed using a design and buffering technique, and symbolic layout notation, well suited for robust design in GaAs DCFL logic. The results obtained so far show that they represent a good compromise between speed, area, and power for VLSI circuits.||URI:||http://hdl.handle.net/10553/53198||ISSN:||0956-3768||Source:||Iee Proceedings-G Circuits Devices And Systems[ISSN 0956-3768],v. 139 (2), p. 205-216|
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