Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45096
Title: Integer and control units for a GaAs 32-bit RISC processor
Authors: Carballo, P. P. 
Sarmiento, R. 
Núñez, A. 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: Semiconducting gallium arsenide
Reduced instruction set computing
VLSI circuits
Issue Date: 1993
Publisher: 0165-6074
Journal: Microprocessing and Microprogramming 
Conference: 18TH EUROMICRO CONF - SOFTWARE AND HARDWARE : SPECIFICATION AND DESIGN ( EUROMICRO 92 ) 
Abstract: In this paper we present the design and simulation of the Integer and Control Units of AsGaR, a RISC processor featuring a proprietary streamlined architecture. Running at a clock speed of 440 MHz, it delivers a peak throughput of 110 MIPS. The work reported here makes clear the level of complexity faced by this kind of designs and the need to use a wholistic approach considering all aspects of system implementation. AsGaR has been implemented in a TriQuint GaAs process, using a standard cell library. The current shortage of tools for GaAs design has been overcome by adapting the Cadence/Edge environment to this technology. Simulation has been done by describing the cell library in System Hilo and Verilog.
URI: http://hdl.handle.net/10553/45096
ISSN: 0165-6074
DOI: 10.1016/0165-6074(93)90026-H
Source: Microprocessing and Microprogramming[ISSN 0165-6074],v. 37, p. 105-108
Appears in Collections:Artículos
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