Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/75504
Título: Reliability analysis of the shyloc ccsds123 ip core for lossless hyperspectral image compression using cots FPGAs
Autores/as: Aranda, Luis Alberto
Sánchez Clemente, Antonio José 
Garcia-Herrero, Francisco
Barrios Alfaro, Yubal 
Sarmiento, Roberto 
Maestro, Juan Antonio
Clasificación UNESCO: 3307 Tecnología electrónica
Palabras clave: Fault Injection
FPGA
Hyperspectral Image Compression
Reliability
Soft Errors
Fecha de publicación: 2020
Publicación seriada: Electronics (Switzerland) 
Resumen: Hyperspectral images can comprise hundreds of spectral bands, which means that they can represent a large volume of data difficult to manage with the available on-board resources. Lossless compression solutions are interesting for reducing the amount of information stored or transmitted while preserving it at the same time. The Hyperspectral Lossless Compressor for space applications (SHyLoC), which is part of the European Space Agency (ESA) IP core’s library, has been demonstrated to meet the requirements of space missions in terms of compression efficiency, low complexity and high throughput. Currently, there is a trend to use Commercial Off-The-Shelf (COTS) on-board electronic devices on small satellites. Moreover, commercial Field-Programmable Gate Arrays (FPGAs) have been used in a number of them. Hence, a reliability analysis is required to ensure the robustness of the applications to Single Event Upsets (SEUs) in the configuration memory. In this work, we present a reliability analysis of this hyperspectral image compression module as a first step towards the development of ad-hoc fault-tolerant protection techniques for the SHyLoC IP core. The reliability analysis is performed using a fault-injection-based experimental set-up in which a hardware implementation of the Consultative Committee for Space Data Systems (CCSDS) 123.0-B-1 lossless compression standard is tested against configuration memory errors in a Xilinx Zynq XC7Z020 System-on-Chip. The results obtained for unhardened and redundancy-based protected versions of the module are put into perspective in terms of area/power consumption and availability/protection coverage gained to provide insight into the development of more efficient knowledge-based protection schemes.
URI: http://hdl.handle.net/10553/75504
ISSN: 2079-9292
DOI: 10.3390/electronics9101681
Fuente: Electronics (Switzerland) [EISSN 2079-9292], v. 9 (10), 1681, (Octubre 2020)
Colección:Artículos
miniatura
Adobe PDF (2,04 MB)
Vista completa

Citas SCOPUSTM   

7
actualizado el 17-nov-2024

Citas de WEB OF SCIENCETM
Citations

5
actualizado el 17-nov-2024

Visitas

75
actualizado el 22-jul-2023

Descargas

80
actualizado el 22-jul-2023

Google ScholarTM

Verifica

Altmetric


Comparte



Exporta metadatos



Los elementos en ULPGC accedaCRIS están protegidos por derechos de autor con todos los derechos reservados, a menos que se indique lo contrario.