Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/70085
|Title:||Evaluation of TMR effectiveness for soft error mitigation in SHyLoC compression IP core implemented on Zynq SoC under heavy ion radiation||Authors:||Sanchez, Antonio
|Issue Date:||2019||Journal:||2019 Ieee International Symposium On Defect And Fault Tolerance In Vlsi And Nanotechnology Systems, Dft 2019||Abstract:||© 2019 IEEE. This work analyses the results of applying Triple Modular Redundancy (TMR) to the SHyLoC CCSDS-121 IP, a hardware implementation of the Consultative Committee for Space Data Systems (CCSDS) 121.0-B-2 lossless compression standard, a universal compressor specifically thought for space applications. The results obtained in a radiation experiment performed at the North Area new facilities at CERN are presented. The objective is to evaluate the robustness applying TMR to the design, by comparing to the unhardened implementation of the SHyLoC CCSDS-121 IP, when it is working under Ultra High Energy radiation. Both TMR and unhardened implementations of the SHyLoC CCSDS-121 IP were implemented in a Xilinx Zynq XC7Z020 System-on-Chip and radiated with Pb ions. Compression results were compared against a golden reference, obtaining a Mean Time To Failure (MTTF) a 40% higher for the TMR design than for the unhardened one.||URI:||http://hdl.handle.net/10553/70085||ISBN:||9781728122601||DOI:||10.1109/DFT.2019.8875281||Source:||2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019|
|Appears in Collections:||Actas de congresos|
Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.