Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49661
Title: CMOS driver-receiver pair for low-swing signaling for low energy on-chip interconnects
Authors: García Montesdeoca, José C.
Montiel-Nelson, Juan A. 
Nooshabadi, Saeid
Issue Date: 2009
Publisher: 1063-8210
Journal: IEEE Transactions on Very Large Scale Integration (VLSI) Systems 
Abstract: This paper describes the design of symmetric low-swing driver-receiver pairs (mj-sib) and (mj-db) for driving signals on the global interconnect lines. The proposed signaling schemes were implemented on 1.0 V 0.13-mu m CMOS technology, for signal transmission along a wire-length of 10 mm and the extra fan-out load of 2.5 pF (on the wire). The mj-sib and mj-db schemes reduce delay by up to 47% and 38% and energy-delay product by up to 34% and 49%, respectively, when compared with other counterpart symmetric and asymmetric low-swing signaling schemes. The other key advantages of the proposed signaling schemes is that they require only one power supply and threshold voltage, hence significantly reducing the design complexity. This paper also confirms the relative reliability benefit,; of the proposed signaling techniques through a signal-to-noise ratio (SNR) analysis.
URI: http://hdl.handle.net/10553/49661
ISSN: 1063-8210
DOI: 10.1109/TVLSI.2008.2004549
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems[ISSN 1063-8210],v. 17, p. 311-316
Appears in Collections:Artículos
Show full item record

SCOPUSTM   
Citations

12
checked on Aug 1, 2021

WEB OF SCIENCETM
Citations

10
checked on Aug 1, 2021

Page view(s)

5
checked on Jul 24, 2021

Google ScholarTM

Check

Altmetric


Share



Export metadata



Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.