Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/49661
Campo DC Valoridioma
dc.contributor.authorGarcía Montesdeoca, José C.
dc.contributor.authorMontiel-Nelson, Juan A.
dc.contributor.authorNooshabadi, Saeid
dc.contributor.otherMontiel-Nelson, Juan
dc.date.accessioned2018-11-24T09:42:20Z-
dc.date.available2018-11-24T09:42:20Z-
dc.date.issued2009
dc.identifier.issn1063-8210
dc.identifier.urihttp://hdl.handle.net/10553/49661-
dc.description.abstractThis paper describes the design of symmetric low-swing driver-receiver pairs (mj-sib) and (mj-db) for driving signals on the global interconnect lines. The proposed signaling schemes were implemented on 1.0 V 0.13-mu m CMOS technology, for signal transmission along a wire-length of 10 mm and the extra fan-out load of 2.5 pF (on the wire). The mj-sib and mj-db schemes reduce delay by up to 47% and 38% and energy-delay product by up to 34% and 49%, respectively, when compared with other counterpart symmetric and asymmetric low-swing signaling schemes. The other key advantages of the proposed signaling schemes is that they require only one power supply and threshold voltage, hence significantly reducing the design complexity. This paper also confirms the relative reliability benefit,; of the proposed signaling techniques through a signal-to-noise ratio (SNR) analysis.
dc.publisher1063-8210
dc.relation.ispartofIEEE Transactions on Very Large Scale Integration (VLSI) Systems
dc.sourceIEEE Transactions on Very Large Scale Integration (VLSI) Systems[ISSN 1063-8210],v. 17, p. 311-316
dc.titleCMOS driver-receiver pair for low-swing signaling for low energy on-chip interconnects
dc.typeinfo:eu-repo/semantics/Articlees
dc.typeArticlees
dc.identifier.doi10.1109/TVLSI.2008.2004549
dc.identifier.scopus58849117193
dc.identifier.isi000262778500015
dcterms.isPartOfIeee Transactions On Very Large Scale Integration (Vlsi) Systems
dcterms.sourceIeee Transactions On Very Large Scale Integration (Vlsi) Systems[ISSN 1063-8210],v. 17 (2), p. 311-316
dc.contributor.authorscopusid22937461700
dc.contributor.authorscopusid6603626866
dc.contributor.authorscopusid6602486254
dc.description.lastpage316
dc.description.firstpage311
dc.relation.volume17
dc.type2Artículoes
dc.identifier.wosWOS:000262778500015
dc.contributor.daisngid13796556
dc.contributor.daisngid480589
dc.contributor.daisngid184255
dc.identifier.investigatorRIDK-6805-2013
dc.contributor.wosstandardWOS:Montesdeoca, JCG
dc.contributor.wosstandardWOS:Montiel-Nelson, JA
dc.contributor.wosstandardWOS:Nooshabadi, S
dc.date.coverdateFebrero 2009
dc.identifier.ulpgces
dc.description.jcr1,01
dc.description.jcrqQ2
dc.description.scieSCIE
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
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