Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/49661
Título: CMOS driver-receiver pair for low-swing signaling for low energy on-chip interconnects
Autores/as: García Montesdeoca, José C.
Montiel-Nelson, Juan A. 
Nooshabadi, Saeid
Fecha de publicación: 2009
Editor/a: 1063-8210
Publicación seriada: IEEE Transactions on Very Large Scale Integration (VLSI) Systems 
Resumen: This paper describes the design of symmetric low-swing driver-receiver pairs (mj-sib) and (mj-db) for driving signals on the global interconnect lines. The proposed signaling schemes were implemented on 1.0 V 0.13-mu m CMOS technology, for signal transmission along a wire-length of 10 mm and the extra fan-out load of 2.5 pF (on the wire). The mj-sib and mj-db schemes reduce delay by up to 47% and 38% and energy-delay product by up to 34% and 49%, respectively, when compared with other counterpart symmetric and asymmetric low-swing signaling schemes. The other key advantages of the proposed signaling schemes is that they require only one power supply and threshold voltage, hence significantly reducing the design complexity. This paper also confirms the relative reliability benefit,; of the proposed signaling techniques through a signal-to-noise ratio (SNR) analysis.
URI: http://hdl.handle.net/10553/49661
ISSN: 1063-8210
DOI: 10.1109/TVLSI.2008.2004549
Fuente: IEEE Transactions on Very Large Scale Integration (VLSI) Systems[ISSN 1063-8210],v. 17, p. 311-316
Colección:Artículos
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