Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49649
Title: A genetic algorithm methodology to find the maximum datapath coverage for combinational logic circuits
Authors: Sosa, Javier 
Montiel-Nelson, Juan A. 
Nooshabadi, Saeid
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: Vector generation
genetic algorithms
datapath coverage
VLSI
Issue Date: 2010
Publisher: 0218-1266
Journal: Journal of Circuits, Systems and Computers 
Abstract: In this paper, we present a genetic algorithm (GA) based methodology for vector generation that maximizes the metric of datapath coverage for a given combinational logic circuit, and compare it with a standard greedy algorithm. The search of maximum coverage vectors is a complex optimization of a satisfiability problem. The GA deals with the optimization problem, whilst an external satisfiability solver is invoked to deal with the coverage problem. Experimental results and performance comparisons based on the large set of MCNC'91 suite of benchmark circuits are presented. They show significant speedups of the GA methodology against a greedy algorithm for large circuits.
URI: http://hdl.handle.net/10553/49649
ISSN: 0218-1266
DOI: 10.1142/S0218126610006165
Source: Journal of Circuits, Systems and Computers[ISSN 0218-1266],v. 19, p. 435-450
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