Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45095
Title: Implementation of CORDIC processor for CFFT computation in gallium arsenide technology
Authors: Sarmiento, R. 
Eshraghian, K.
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: Gallium arsenide
Signal processing algorithms
Very large scale integration
Fast Fourier transforms
Digital signal processing
CMOS technology
Foundries
Issue Date: 1994
Journal: Proceedings of the European Design and Test Conference
Conference: Proceedings of the European Design and Test Conference 
Abstract: In this paper the architecture and the implementation of a complex fast Fourier transform (CFFT) processor using 0.8 /spl mu/m gallium arsenide technology is presented. The processor is based upon the CORDIC algorithm in which elementary functions use only add and shift operations instead of the more conventional multiply and add hardware. In this architecture functional primitives were designed and extensively simulated taking into account process variations and in particular up to /spl plusmn/3/spl sigma/ of threshold voltage variation. Issues pertaining to the design of a 1024 point CFFT processor with 16 bit data and operating up to 1 GHz are discussed.
URI: http://hdl.handle.net/10553/45095
ISBN: 0818654112
Source: Proceedings of the European Design and Test Conference, p. 238-244
Appears in Collections:Actas de congresos
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