Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/45094
| Título: | Gallium arsenide MESFET memory architectures | Autores/as: | López Feliciano, José Francisco Eshraghian, K. McGeever, M. K. Nunez, A. Sarmiento, R. |
Clasificación UNESCO: | 3307 Tecnología electrónica | Palabras clave: | Gallium arsenide MESFETs Leakage current Very large scale integration FETs |
Fecha de publicación: | 1995 | Publicación seriada: | Records of the IEEE International Workshop on Memory Technology, Design and Testing | Conferencia: | Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing | Resumen: | Gallium arsenide (GaAs) technology, because of its high speed, offers an alternative to silicon (Si). For the particular case of digital memories, speed has great importance taking into account that the success of a high-performance microprocessor depends greatly on how fast data are obtained and sent to memory. However, GaAs presents some problems when implementing memories, mainly due to its leaky characteristics and the small output logic swing compared to that produced in MOS devices. In this paper, novel architectures are proposed in order to overcome these problems. As a result, different designs have been implemented for 2- and 5-kbit ROMs, and for a 14-kbit DRAM. | URI: | http://hdl.handle.net/10553/45094 | Fuente: | Records of the IEEE International Workshop on Memory Technology, Design and Testing, p. 103-108 |
| Colección: | Actas de congresos |
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