Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/72656
Campo DC | Valor | idioma |
---|---|---|
dc.contributor.author | Moure, Juan C. | en_US |
dc.contributor.author | Benítez, Domingo | en_US |
dc.contributor.author | Rexachs, Dolores I. | en_US |
dc.contributor.author | Luque, Emilio | en_US |
dc.date.accessioned | 2020-05-20T09:27:35Z | - |
dc.date.available | 2020-05-20T09:27:35Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.isbn | 978-1-59593-282-2 | en_US |
dc.identifier.other | Scopus | - |
dc.identifier.uri | http://hdl.handle.net/10553/72656 | - |
dc.description.abstract | High prediction bandwidth enables performance improvements and power reduction techniques. This paper explores a mechanism to increase prediction width (instructions per prediction) by predicting instruction traces. Our analysis shows that predicting traces including multiple branches is not significantly less accurate than predicting single branches. A novel Local Trace Predictor organization is proposed. It increases prediction width without reducing the ratio of prediction accuracy versus memory resources with respect to a Basic Block Predictor.Compared to the previously proposed Next-Trace Predictor, the Local Trace Predictor reduces memory requirements by codifying trace predictions, and by limiting the number of traces starting at the same instruction to 2 or 4. The limit lessens prediction width only slightly, and does not affect prediction accuracy. The overall result is that the Local Trace Predictor outperforms the Next-Trace Predictor for sizes higher than 12 KBytes. | en_US |
dc.language | eng | en_US |
dc.source | Proceedings of the International Conference on Supercomputing, p. 55-65, (Diciembre 2006) | en_US |
dc.subject | 1203 Ciencia de los ordenadores | en_US |
dc.subject | 330406 Arquitectura de ordenadores | en_US |
dc.subject.other | Branch Prediction | en_US |
dc.subject.other | High Bandwidth Fetch Mechanism | en_US |
dc.title | Wide and efficient trace prediction using the local trace predictor | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | en_US |
dc.type | ConferenceObject | en_US |
dc.relation.conference | 20th Annual International Conference on Supercomputing, ICS 2006 | en_US |
dc.identifier.doi | 10.1145/1183401.1183411 | en_US |
dc.identifier.scopus | 34547409308 | - |
dc.contributor.authorscopusid | 57188672353 | - |
dc.contributor.authorscopusid | 7003286582 | - |
dc.contributor.authorscopusid | 6506076654 | - |
dc.contributor.authorscopusid | 7005407181 | - |
dc.description.lastpage | 65 | en_US |
dc.description.firstpage | 55 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.utils.revision | No | en_US |
dc.date.coverdate | Diciembre 2006 | en_US |
dc.identifier.conferenceid | events121323 | - |
dc.identifier.ulpgc | Sí | es |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.event.eventsstartdate | 28-06-2006 | - |
crisitem.event.eventsenddate | 01-07-2006 | - |
crisitem.author.dept | GIR SIANI: Modelización y Simulación Computacional | - |
crisitem.author.dept | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.dept | Departamento de Informática y Sistemas | - |
crisitem.author.orcid | 0000-0003-2952-2972 | - |
crisitem.author.parentorg | IU Sistemas Inteligentes y Aplicaciones Numéricas | - |
crisitem.author.fullName | Benítez Díaz, Domingo Juan | - |
Colección: | Actas de congresos |
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