Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/63423
Title: High-Level Synthesis of Multiclass SVM Using Code Refactoring to Classify Brain Cancer from Hyperspectral Images
Authors: Baez, Abelardo
Fabelo Gómez, Himar Antonio 
Florimbi, Giordana 
Torti, Emanuele
Hernandez, Abian
Leporati, Francesco
Danese, Giovanni
Sarmiento Rodríguez, Roberto 
Ortega, Samuel 
Callico, Gustavo M. 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: High-Level Synthesis
Hls
Sdsoc
Support Vector Machines
Svm, et al
Issue Date: 2019
Project: Identificación Hiperespectral de Tumores Cerebrales (Ithaca)
Plataforma H2/Sw Distribuida Para El Procesamiento Inteligente de Información Sensorial Heterogenea en Aplicaciones de Supervisión de Grandes Espacios Naturales
Journal: Electronics (Switzerland) 
Abstract: Currently, high-level synthesis (HLS) methods and tools are a highly relevant area in the strategy of several leading companies in the field of system-on-chips (SoCs) and field programmable gate arrays (FPGAs). HLS facilitates the work of system developers, who benefit from integrated and automated design workflows, considerably reducing the design time. Although many advances have been made in this research field, there are still some uncertainties about the quality and performance of the designs generated with the use of HLS methodologies. In this paper, we propose an optimization of the HLS methodology by code refactoring using Xilinx SDSoCTM (Software-Defined System-On-Chip). Several options were analyzed for each alternative through code refactoring of a multiclass support vector machine (SVM) classifier written in C, using two different Zynq®-7000 SoC devices from Xilinx, the ZC7020 (ZedBoard) and the ZC7045 (ZC706). The classifier was evaluated using a brain cancer database of hyperspectral images. The proposed methodology not only reduces the required resources using less than 20% of the FPGA, but also reduces the power consumption −23% compared to the full implementation. The speedup obtained of 2.86× (ZC7045) is the highest found in the literature for SVM hardware implementations.
URI: http://hdl.handle.net/10553/63423
ISSN: 2079-9292
DOI: 10.3390/electronics8121494
Source: Electronics,v. 8 (12), (Diciembre 2019)
Appears in Collections:Artículos
Thumbnail
Adobe PDF (1,04 MB)
Show full item record

WEB OF SCIENCETM
Citations

1
checked on May 9, 2021

Page view(s)

64
checked on May 10, 2021

Download(s)

65
checked on May 10, 2021

Google ScholarTM

Check

Altmetric


Share



Export metadata



Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.