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http://hdl.handle.net/10553/63419
Título: | RHBD Techniques to Mitigate SEU and SET in CMOS Frequency Synthesizers | Autores/as: | Díez Acereda, Victoria You Lalchand Khemchandani, Sunil Del Pino Suárez, Francisco Javier Mateos Angulo, Sergio |
Clasificación UNESCO: | 3307 Tecnología electrónica | Palabras clave: | CMOS technology Radiation effects Single event transient Single event upset |
Fecha de publicación: | 2019 | Editor/a: | MDPI | Proyectos: | Diseño de Circuitos de Comunicaciones Para Alta Radiacion Ambiental Diseño de Amplificadores de Potencia Integrados de Nitruro de Galio Para Comunicaciones Exploring Modern Integrated Circuits Design in Harsh Environments. |
Publicación seriada: | Electronics (Switzerland) | Resumen: | This paper presents a thorough study of radiation effects on a frequency synthesizer designed in a 0.18 mu m CMOS technology. In CMOS devices, the effect of a high energy particle impact can be modeled by a current pulse connected to the drain of the transistors. The effects of SET (single event transient) and SEU (single event upset) were analyzed connecting current pulses to the drains of all the transistors and analyzing the amplitude variations and phase shifts obtained at the output nodes. Following this procedure, the most sensitive circuits were detected. This paper proposes a combination of radiation hardening-by-design techniques (RHBD) such as resistor-capacitor (RC) filtering or local circuit-redundancy to mitigate the effects of radiation. The proposed modifications make the frequency synthesizer more robust against radiation. | URI: | http://hdl.handle.net/10553/63419 | ISBN: | 978-3-03921-279-8 | ISSN: | 2079-9292 | DOI: | 10.3390/electronics8060690 | Fuente: | Electronics [ISSN 2079-9292], v. 8 (6), 690, (Junio 2019) |
Colección: | Artículos |
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