|Title:||RHBD Techniques to Mitigate SEU and SET in CMOS Frequency Synthesizers||Authors:||Diez-Acereda, V
Lalchand Khemchandani, Sunil
Del Pino Suárez, Francisco Javier
Mateos Angulo, S.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||CMOS technology
Single event transient
Single event upset
|Issue Date:||2019||Journal:||Electronics (Switzerland)||Abstract:||This paper presents a thorough study of radiation effects on a frequency synthesizer designed in a 0.18 mu m CMOS technology. In CMOS devices, the effect of a high energy particle impact can be modeled by a current pulse connected to the drain of the transistors. The effects of SET (single event transient) and SEU (single event upset) were analyzed connecting current pulses to the drains of all the transistors and analyzing the amplitude variations and phase shifts obtained at the output nodes. Following this procedure, the most sensitive circuits were detected. This paper proposes a combination of radiation hardening-by-design techniques (RHBD) such as resistor-capacitor (RC) filtering or local circuit-redundancy to mitigate the effects of radiation. The proposed modifications make the frequency synthesizer more robust against radiation.||URI:||http://hdl.handle.net/10553/63419||ISSN:||2079-9292||DOI:||10.3390/electronics8060690||Source:||Electronics [ISSN 2079-9292], v. 8 (6)|
|Appears in Collections:||Artículos|
Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.