Please use this identifier to cite or link to this item:
Title: State-of-the-art in CMOS threshold-logic VLSI gate implementations and applications
Authors: Celinski, Peter
Cotofana, Sorin D.
López, José F. 
Al-Sarawi, Said
Abbott, Derek
Issue Date: 2003
Publisher: 0277-786X
Journal: Proceedings of SPIE - The International Society for Optical Engineering 
Conference: VLSI Circuits and Systems 
Abstract: In recent years, there has been renewed interest in Threshold Logic (TL), mainly as a result of the development of a number of successful implementations of TL gates in CMOS. This paper presents a summary of the recent developments in TL circuit design. High-performance TL gate circuit implementations are compared, and a number of their applications in computer arithmetic operations are reviewed. It is shown that the application of TL in computer arithmetic circuit design can yield designs with significantly reduced transistor count and area while at the same time reducing circuit delay and power dissipation when compared to conventional CMOS logic.
ISSN: 0277-786X
DOI: 10.1117/12.497792
Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 53-64
Appears in Collections:Actas de congresos
Show full item record


checked on Nov 19, 2023

Page view(s)

checked on Jul 23, 2022

Google ScholarTM




Export metadata

Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.