Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/50505
DC FieldValueLanguage
dc.contributor.authorSantana, Oliverio J.en_US
dc.contributor.authorRamirez, Alexen_US
dc.contributor.authorLarriba-Pey, Josep L.en_US
dc.contributor.authorValero, Mateoen_US
dc.date.accessioned2018-11-24T16:33:34Z-
dc.date.available2018-11-24T16:33:34Z-
dc.date.issued2004en_US
dc.identifier.issn1544-3566en_US
dc.identifier.urihttp://hdl.handle.net/10553/50505-
dc.description.abstractFetch engine performance is a key topic in superscalar processors, since it limits the instruction-level parallelism that can be exploited by the execution core. In the search of high performance, the fetch engine has evolved toward more efficient designs, but its complexity has also increased.In this paper, we present the stream fetch engine, a novel architecture based on the execution of long streams of sequential instructions, taking maximum advantage of code layout optimizations. We describe our design in detail, showing that it achieves high fetch performance, while requiring less complexity than other state-of-the-art fetch architectures.en_US
dc.languageengen_US
dc.relation.ispartofTransactions on Architecture and Code Optimizationen_US
dc.sourceACM Transactions on Architecture and Code Optimization [ISSN 1544-3566], v. 1 (2), p. 220-245en_US
dc.subject330406 Arquitectura de ordenadoresen_US
dc.subject.otherBranch predictionen_US
dc.subject.otherDesignen_US
dc.subject.otherFetch architectureen_US
dc.subject.otherHigh performanceen_US
dc.subject.otherInstruction streamen_US
dc.subject.otherLow complexityen_US
dc.subject.otherPerformanceen_US
dc.titleA low-complexity fetch architecture for high-performance superscalar processorsen_US
dc.typeinfo:eu-repo/semantics/articlees
dc.typeArticlees
dc.identifier.doi10.1145/1011528.1011532en_US
dc.identifier.scopus33646373633-
dc.contributor.authorscopusid7003605046-
dc.contributor.authorscopusid55837529000-
dc.contributor.authorscopusid6603588897-
dc.contributor.authorscopusid24475914200-
dc.identifier.eissn1544-3973-
dc.description.lastpage245-
dc.identifier.issue2-
dc.description.firstpage220-
dc.relation.volume1-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.identifier.ulpgces
dc.description.scieSCIE
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR SIANI: Inteligencia Artificial, Robótica y Oceanografía Computacional-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.orcid0000-0001-7511-5783-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameSantana Jaria, Oliverio Jesús-
Appears in Collections:Artículos
Show simple item record

Google ScholarTM

Check

Altmetric


Share



Export metadata



Items in accedaCRIS are protected by copyright, with all rights reserved, unless otherwise indicated.