Gallium arsenide based fast feed through logic (FTL)

Abstract

A GaAs logic family using the feed through evaluation concept is presented. The logic outputs reset to low during the high phase of the clock and evaluate during the low phase of the clock. Resetting to low alleviates the problems of charge-sharing and leakage current associated with other GaAs dynamic logic families. This novel concept is compared with other common GaAs logic circuits in terms of, device count, chip area, delay, clock rate and power consumption.