Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/49696
DC FieldValueLanguage
dc.contributor.authorMontiel-Nelson, J. A.en_US
dc.contributor.authorNooshabadi, S. V.en_US
dc.contributor.otherMontiel-Nelson, Juan-
dc.date.accessioned2018-11-24T09:58:10Z-
dc.date.available2018-11-24T09:58:10Z-
dc.date.issued1997en_US
dc.identifier.issn1350-2409en_US
dc.identifier.urihttp://hdl.handle.net/10553/49696-
dc.description.abstractAn asynchronous FIR architecture design using a mixed mode logic approach in GaAs technology is presented. Combining an asynchronous design style with static and dynamic logic proves to be very suitable for high speed and low power implementation of real time mobile computing applications. The authors introduce a novel clocked dynamic latched (CDL) logic in GaAs to implement the micropipeline latches required in the single phase signalling. The reliable implementation of an 11-tap FIR filter in terms of speed, area and power dissipation in GaAs MESFET 0.6 mu m Vitesse technology is demonstrated. This ASIC system is fully operative across the full range of process spread variations and the temperature range of 0 to 100 degrees C. It is robust against power supply variations of 15%.en_US
dc.languageengen_US
dc.publisher1350-2409-
dc.relation.ispartofIEE Proceedings: Circuits, Devices and Systemsen_US
dc.sourceIEE Proceedings: Circuits, Devices and Systems[ISSN 1350-2409],v. 144, p. 289-296en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherFIR filtersen_US
dc.subject.otherfield effect logic circuitsen_US
dc.subject.otherGallium arsenideen_US
dc.subject.otherLogic designen_US
dc.subject.otherMESFET integrated circuitsen_US
dc.subject.otherintegrated circuit designen_US
dc.subject.otherIII-V semiconductorsen_US
dc.titleHigh performance asynchronous FIR filter design in gaAsen_US
dc.typeinfo:eu-repo/semantics/Articleen_US
dc.typeArticleen_US
dc.identifier.doi10.1049/ip-cds:19971324en_US
dc.identifier.scopus0031244628-
dc.identifier.isi000073870400007-
dcterms.isPartOfIee Proceedings-Circuits Devices And Systems-
dcterms.sourceIee Proceedings-Circuits Devices And Systems[ISSN 1350-2409],v. 144 (5), p. 289-296-
dc.contributor.authorscopusid6603626866-
dc.contributor.authorscopusid6602486254-
dc.description.lastpage296en_US
dc.description.firstpage289en_US
dc.relation.volume144en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.identifier.wosWOS:000073870400007-
dc.contributor.daisngid480589-
dc.contributor.daisngid20385918-
dc.contributor.daisngid184255-
dc.identifier.investigatorRIDK-6805-2013-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Montiel-Nelson, JA-
dc.contributor.wosstandardWOS:Nooshabadi, SV-
dc.date.coverdateEnero 1997en_US
dc.identifier.ulpgces
dc.description.jcr0,254
dc.description.jcrqQ3
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR IUMA: Instrumentación avanzada-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-4323-8097-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameMontiel Nelson, Juan Antonio-
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