Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/49696
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Montiel-Nelson, J. A. | en_US |
dc.contributor.author | Nooshabadi, S. V. | en_US |
dc.contributor.other | Montiel-Nelson, Juan | - |
dc.date.accessioned | 2018-11-24T09:58:10Z | - |
dc.date.available | 2018-11-24T09:58:10Z | - |
dc.date.issued | 1997 | en_US |
dc.identifier.issn | 1350-2409 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/49696 | - |
dc.description.abstract | An asynchronous FIR architecture design using a mixed mode logic approach in GaAs technology is presented. Combining an asynchronous design style with static and dynamic logic proves to be very suitable for high speed and low power implementation of real time mobile computing applications. The authors introduce a novel clocked dynamic latched (CDL) logic in GaAs to implement the micropipeline latches required in the single phase signalling. The reliable implementation of an 11-tap FIR filter in terms of speed, area and power dissipation in GaAs MESFET 0.6 mu m Vitesse technology is demonstrated. This ASIC system is fully operative across the full range of process spread variations and the temperature range of 0 to 100 degrees C. It is robust against power supply variations of 15%. | en_US |
dc.language | eng | en_US |
dc.publisher | 1350-2409 | - |
dc.relation.ispartof | IEE Proceedings: Circuits, Devices and Systems | en_US |
dc.source | IEE Proceedings: Circuits, Devices and Systems[ISSN 1350-2409],v. 144, p. 289-296 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | FIR filters | en_US |
dc.subject.other | field effect logic circuits | en_US |
dc.subject.other | Gallium arsenide | en_US |
dc.subject.other | Logic design | en_US |
dc.subject.other | MESFET integrated circuits | en_US |
dc.subject.other | integrated circuit design | en_US |
dc.subject.other | III-V semiconductors | en_US |
dc.title | High performance asynchronous FIR filter design in gaAs | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1049/ip-cds:19971324 | en_US |
dc.identifier.scopus | 0031244628 | - |
dc.identifier.isi | 000073870400007 | - |
dcterms.isPartOf | Iee Proceedings-Circuits Devices And Systems | - |
dcterms.source | Iee Proceedings-Circuits Devices And Systems[ISSN 1350-2409],v. 144 (5), p. 289-296 | - |
dc.contributor.authorscopusid | 6603626866 | - |
dc.contributor.authorscopusid | 6602486254 | - |
dc.description.lastpage | 296 | en_US |
dc.description.firstpage | 289 | en_US |
dc.relation.volume | 144 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.identifier.wos | WOS:000073870400007 | - |
dc.contributor.daisngid | 480589 | - |
dc.contributor.daisngid | 20385918 | - |
dc.contributor.daisngid | 184255 | - |
dc.identifier.investigatorRID | K-6805-2013 | - |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Montiel-Nelson, JA | - |
dc.contributor.wosstandard | WOS:Nooshabadi, SV | - |
dc.date.coverdate | Enero 1997 | en_US |
dc.identifier.ulpgc | Sí | es |
dc.description.jcr | 0,254 | |
dc.description.jcrq | Q3 | |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-4323-8097 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Montiel Nelson, Juan Antonio | - |
Appears in Collections: | Artículos |
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