Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/49676
| Campo DC | Valor | idioma |
|---|---|---|
| dc.contributor.author | Navarro-Botello, Victor | en_US |
| dc.contributor.author | Montiel-Nelson, Juan A. | en_US |
| dc.contributor.author | Nooshabadi, Saeid | en_US |
| dc.contributor.author | Dyer, Mike | en_US |
| dc.date.accessioned | 2018-11-24T09:49:02Z | - |
| dc.date.available | 2018-11-24T09:49:02Z | - |
| dc.date.issued | 2006 | en_US |
| dc.identifier.isbn | 1424401739 | en_US |
| dc.identifier.issn | 1548-3746 | en_US |
| dc.identifier.uri | http://hdl.handle.net/10553/49676 | - |
| dc.description.abstract | This paper presents the design of low power high performance arithmetic circuits using the feedthrough logic (FTL) [1] concept. Low power FTL arithmetic circuits provide for smaller propagation time delay (2.6 times), lower energy consumption (31%), and similar combined delay, power consumption, and active area product, when compared with the standard CMOS technologies. | en_US |
| dc.language | eng | en_US |
| dc.relation.ispartof | Midwest Symposium on Circuits and Systems | en_US |
| dc.source | Midwest Symposium on Circuits and Systems[ISSN 1548-3746],v. 1 (4267238), p. 709-712 | en_US |
| dc.subject | 3307 Tecnología electrónica | en_US |
| dc.subject.other | CMOS logic circuits | en_US |
| dc.subject.other | CMOS technology | en_US |
| dc.subject.other | Logic design | en_US |
| dc.subject.other | Energy consumption | en_US |
| dc.subject.other | Delay effects | en_US |
| dc.subject.other | Adders | en_US |
| dc.subject.other | Pulse inverters | en_US |
| dc.title | Low power arithmetic circuits in feedthrough dynamic CMOS logic | en_US |
| dc.type | info:eu-repo/semantics/conferenceObject | en_US |
| dc.type | ConferenceObject | en_US |
| dc.relation.conference | 49th IEEE International Midwest Symposium on Circuits and Systems | en_US |
| dc.identifier.doi | 10.1109/MWSCAS.2006.382161 | en_US |
| dc.identifier.scopus | 34748814838 | - |
| dc.identifier.isi | 000248117800147 | - |
| dc.contributor.authorscopusid | 16402360500 | - |
| dc.contributor.authorscopusid | 6603626866 | - |
| dc.contributor.authorscopusid | 6602486254 | - |
| dc.contributor.authorscopusid | 57196887770 | - |
| dc.description.lastpage | 712 | en_US |
| dc.identifier.issue | 4267238 | - |
| dc.description.firstpage | 709 | en_US |
| dc.relation.volume | 1 | en_US |
| dc.investigacion | Ingeniería y Arquitectura | en_US |
| dc.type2 | Actas de congresos | en_US |
| dc.contributor.daisngid | 5213989 | - |
| dc.contributor.daisngid | 480589 | - |
| dc.contributor.daisngid | 184255 | - |
| dc.contributor.daisngid | 9377717 | - |
| dc.utils.revision | Sí | en_US |
| dc.contributor.wosstandard | WOS:Navarro-Botello, V | - |
| dc.contributor.wosstandard | WOS:Montiel-Nelson, JA | - |
| dc.contributor.wosstandard | WOS:Nooshabadi, S | - |
| dc.contributor.wosstandard | WOS:Dyer, M | - |
| dc.date.coverdate | Diciembre 2006 | en_US |
| dc.identifier.conferenceid | events120564 | - |
| dc.identifier.conferenceid | events121327 | - |
| dc.identifier.ulpgc | Sí | es |
| item.grantfulltext | none | - |
| item.fulltext | Sin texto completo | - |
| crisitem.event.eventsstartdate | 06-08-2006 | - |
| crisitem.event.eventsenddate | 09-08-2007 | - |
| crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.orcid | 0000-0003-4323-8097 | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.fullName | Navarro Botello, Victor | - |
| crisitem.author.fullName | Montiel Nelson, Juan Antonio | - |
| Colección: | Actas de congresos | |
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