|Title:||Analysis of High-Performance Fast Feedthrough Logic Families in CMOS||Authors:||Navarro-Botello, Victor
Montiel-Nelson, Juan A.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||CMOS digital integrated circuits
CMOS logic circuits
feedthrough logic (FTL)
high-speed arithmetic circuits
low-power arithmetic circuits
|Issue Date:||2007||Publisher:||1549-7747||Journal:||IEEE Transactions on Circuits and Systems II: Express Briefs||Abstract:||This brief presents a new CMOS logic family using the feedthrough evaluation concept and analyzes its sensitivity against technology parameters for practical applications. The feedthrough logic (FTL) allows for a partial evaluation in a computational block before its input signals are valid, and does a quick final evaluation as soon as the inputs arrive., The FTL is well suited to arithmetic circuits where the critical path is made of a large cascade of inverting gates. Furthermore, FTL based circuits perform better in high fanout and high switching frequencies due to both lower delay and dynamic power consumption. Experimental results, for practical circuits, demonstrate that low-power FTL provides for smaller propagation time delay (4.1 times), lower energy consumption (35.6%), and similar combined delay, power consumption and active area product (0.7% worst), while providing lower sensitivity to power supply, temperature, capacitive load and process variations than the standard CMOS technologies.||URI:||http://hdl.handle.net/10553/49674||ISSN:||1549-7747||DOI:||10.1109/TCSII.2007.891759||Source:||IEEE Transactions on Circuits and Systems II: Express Briefs[ISSN 1549-7747],v. 54, p. 489-493|
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