|Title:||Efficient CMOS driver-receiver pair with low-swing signaling for on-chip interconnects||Authors:||García, José C.
Montiel-Nelson, Juan A.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||Integrated circuit interconnections
CMOS technology, et al
|Issue Date:||2007||Journal:||2007 European Conference On Circuit Theory And Design, Vols 1-3||Conference:||18th European Conference on Circuit Theory Design||Abstract:||This paper describes the design of a symmetric low-swing driver-receiver pair (mj-sib) for driving signals on the global interconnect lines. When implemented on a 0.13 mu m CMOS 1.2V technology, mj-sib scheme reduces energy-delay product by 41.7% (at the receiver load of 0.25pF) and has 38.8% lower delay when compared with a counterpart asymmetric low-swing signaling scheme. Also, mj-sib topology has 14.2% lower energy-delay product and has 36% lower active area (50.25 mu m(2)) when compared with other symmetric low-swing signaling structure. The key advantages of the proposed signaling scheme is that it requires only one power supply and threshold voltage, hence significantly reducing the design complexity.||URI:||http://hdl.handle.net/10553/49668||ISBN:||978-1-4244-1341-6||DOI:||10.1109/ECCTD.2007.4529714||Source:||2007 European Conference On Circuit Theory And Design, Vols 1-3, p. 787-+|
|Appears in Collections:||Actas de congresos|
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