Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/49659
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Navarro Botello,Héctor | en_US |
dc.contributor.author | Nooshabadi, Saeid | en_US |
dc.contributor.author | Montiel- Nelson, Juan A. | en_US |
dc.contributor.author | Navarro, V. | en_US |
dc.contributor.author | Sosa, J. | en_US |
dc.contributor.author | Garcia, Jose C. | en_US |
dc.date.accessioned | 2018-11-24T09:41:27Z | - |
dc.date.available | 2018-11-24T09:41:27Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.isbn | 9781424429530 | en_US |
dc.identifier.other | WoS | - |
dc.identifier.uri | http://hdl.handle.net/10553/49659 | - |
dc.description.abstract | In this paper, inequalities of integer hull polyhedrons are used in mixed integer linear programming (MILP) to model the behavior of combinational subsystems, introducing a new solution for the satisfiability (SAT) problem at register transfer level (RTL). Since in these models the vertexes are located at integer positions, they can be used with linear programming (LP) to solve SAT problems. Unfortunately, when combining together several models to make up a compound RTL description, internal vertexes may appear forcing to declare one or more variables as integer. However, the use of these models inside an RTL SAT problem reduces the number of branches needed to solve the whole integer problem. Results show a CPU solution time reduction greater than one order of magnitude, growing with the size of the problem. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 | en_US |
dc.source | Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 (4810306), p. 272-275 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | Register Transfer Level (RTL) | en_US |
dc.subject.other | Satisfiability (SAT) | en_US |
dc.subject.other | Design Verification | en_US |
dc.subject.other | Linear Programming | en_US |
dc.subject.other | Cutting Planes | en_US |
dc.title | A geometric approach to register transfer level satisfiability | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | en_US |
dc.type | ConferenceObject | en_US |
dc.relation.conference | 10th International Symposium on Quality Electronic Design, ISQED 2009 | en_US |
dc.identifier.doi | 10.1109/ISQED.2009.4810306 | en_US |
dc.identifier.scopus | 67649646219 | - |
dc.identifier.isi | 000268848600046 | - |
dc.contributor.authorscopusid | 23028289000 | - |
dc.contributor.authorscopusid | 6602486254 | - |
dc.contributor.authorscopusid | 6603626866 | - |
dc.contributor.authorscopusid | 57198264956 | - |
dc.contributor.authorscopusid | 56231679300 | - |
dc.contributor.authorscopusid | 9639270900 | - |
dc.description.lastpage | 275 | en_US |
dc.identifier.issue | 4810306 | - |
dc.description.firstpage | 272 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.contributor.daisngid | 8452012 | - |
dc.contributor.daisngid | 184255 | - |
dc.contributor.daisngid | 480589 | - |
dc.contributor.daisngid | 20061557 | - |
dc.contributor.daisngid | 1739656 | - |
dc.contributor.daisngid | 8205808 | - |
dc.description.numberofpages | 2 | en_US |
dc.utils.revision | Sí | en_US |
dc.contributor.wosstandard | WOS:Navarro, H | - |
dc.contributor.wosstandard | WOS:Nooshabadi, S | - |
dc.contributor.wosstandard | WOS:Montiel-Nelson, JA | - |
dc.contributor.wosstandard | WOS:Navarro, V | - |
dc.contributor.wosstandard | WOS:Sosa, J | - |
dc.contributor.wosstandard | WOS:Garcia, JC | - |
dc.date.coverdate | Julio 2009 | en_US |
dc.identifier.conferenceid | events120684 | - |
dc.identifier.ulpgc | Sí | es |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.author.dept | GIR IUMA: Equipos y Sistemas de Comunicación | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.orcid | 0000-0003-4323-8097 | - |
crisitem.author.orcid | 0000-0003-1838-3073 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Navarro Botello,Héctor | - |
crisitem.author.fullName | Montiel Nelson, Juan Antonio | - |
crisitem.author.fullName | Sosa González, Carlos Javier | - |
crisitem.author.fullName | García Montesdeoca,José Carlos | - |
crisitem.event.eventsstartdate | 16-03-2009 | - |
crisitem.event.eventsenddate | 18-03-2009 | - |
Appears in Collections: | Actas de congresos |
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