Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/49653
DC Field | Value | Language |
---|---|---|
dc.contributor.author | García, José C. | en_US |
dc.contributor.author | Montiel-Nelson, Juan A. | en_US |
dc.contributor.author | Nooshabadi, Saeid | en_US |
dc.date.accessioned | 2018-11-24T09:38:45Z | - |
dc.date.available | 2018-11-24T09:38:45Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.isbn | 9781424445219 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/49653 | - |
dc.description.abstract | This paper presents the design of a highly efficient CMOS level shifter qc-level shifter. Unlike many recent level shifters, the proposed qc-level shifter does not use bootstrap capacitors to minimize active area. When implemented on a 65nm CMOS technology, under the large capacitive loading condition (2pF), qc-level shifter has a lower active area (94%), and energy-delay product (21.4%) than the reference bootstrap level shifter circuit (ts-level shifter). In comparison to a conventional shifter (c-level shifter)the corresponding reductions are 9.5% and 55%, respectively. Also qc-level shifter has very small effective input capacitance in comparison with ts-level shifter as it does not need a bootstrap capacitor connected to its input. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | 2009 9th International Symposium on Communications and Information Technology, ISCIT 2009 | en_US |
dc.source | 2009 9th International Symposium on Communications and Information Technology, ISCIT 2009 (5340988), p. 963-966 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | CMOS technology | en_US |
dc.subject.other | CMOS process | en_US |
dc.subject.other | Capacitors | en_US |
dc.subject.other | Delay | en_US |
dc.subject.other | Dynamic voltage scaling | en_US |
dc.subject.other | Energy consumption | en_US |
dc.subject.other | Low voltage | en_US |
dc.subject.other | Energy efficiency | en_US |
dc.subject.other | Performance loss | en_US |
dc.title | High performance CMOS dual supply level shifter for a 0.5V input and 1V output in standard 1.2V 65nm technology process | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | en_US |
dc.type | ConferenceObject | en_US |
dc.relation.conference | 2009 9th International Symposium on Communications and Information Technology, ISCIT 2009 | en_US |
dc.identifier.doi | 10.1109/ISCIT.2009.5340988 | en_US |
dc.identifier.scopus | 74549202729 | - |
dc.contributor.authorscopusid | 9639270900 | - |
dc.contributor.authorscopusid | 6603626866 | - |
dc.contributor.authorscopusid | 6602486254 | - |
dc.description.lastpage | 966 | en_US |
dc.identifier.issue | 5340988 | - |
dc.description.firstpage | 963 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.utils.revision | Sí | en_US |
dc.date.coverdate | Diciembre 2009 | en_US |
dc.identifier.conferenceid | events121373 | - |
dc.identifier.ulpgc | Sí | es |
item.fulltext | Con texto completo | - |
item.grantfulltext | open | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Instrumentación avanzada | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-4323-8097 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | García Montesdeoca,José Carlos | - |
crisitem.author.fullName | Montiel Nelson, Juan Antonio | - |
crisitem.event.eventsstartdate | 28-09-2009 | - |
crisitem.event.eventsenddate | 30-09-2009 | - |
Appears in Collections: | Actas de congresos |
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