|Title:||Video super resolution algorithm implemented on a low-cost NoC-based MPSoC platform||Authors:||Singla, Garbí
De Armas, Valentín D.
|UNESCO Clasification:||3307 Tecnología electrónica||Keywords:||System
Fpga, et al
|Issue Date:||2013||Journal:||2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013||Conference:||2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013||Abstract:||MultiProcessor Systems-on-Chip (MPSoC) are required to fulfill the performance demand of modern real-life embedded applications. For that purpose, Networks-on-Chip (NoC) are proposed as a promising solution to interconnection in MPSoCs for reasons of efficiency and scalability. In this scenario, the need to develop low-cost platforms to support NoC-based SoC design and verification is growing. In this work, the design of a low cost NoC-based MPSoC platform and its application to a video enhancement algorithm based on Super Resolution (SR) are presented. To validate the designed hardware platform, an optimized SR algorithm is mapped on the Processing Elements (PE) of the NoC-based SoC platform. Finally, the performance is characterized from experimental measurements according to the type of application, as well as the number of PE used.||URI:||http://hdl.handle.net/10553/48829||ISBN:||9781479920792||ISSN:||2325-6532||DOI:||10.1109/ReConFig.2013.6732337||Source:||2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013 (6732337)|
|Appears in Collections:||Actas de congresos|
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