Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/47617
| Título: | Gastim - A Timing Analyzer For Gaas Digital Circuits | Autores/as: | Hernández Ballester, Antonio Gomez, L. Nunez, A. |
Clasificación UNESCO: | 3307 Tecnología electrónica | Palabras clave: | Gallium arsenide Digital circuits Logic devices MESFETs CMOS logic circuits, et al. |
Fecha de publicación: | 1993 | Publicación seriada: | Euro-Dac 93 - European Design Automation Conference With Euro-Vhdl 93 : Proceedings | Conferencia: | Proceedings of the European Design Automation Conference | Resumen: | A methodology is presented to calculate delays in DCFL/SDCFL GaAs circuits. The model has been implemented in a prototype timing analyzer. Input slope influences and overlapping input transitions are taken into account. The simulation results show that the proposed model can predict the delay time withing 15% error and with a speed-up of three orders of magnitude for several circuits tested as compared with HSPICE simulations. | URI: | http://hdl.handle.net/10553/47617 | ISBN: | 0818643528 | Fuente: | Euro-Dac 93 - European Design Automation Conference With Euro-Vhdl 93 : Proceedings, p. 190-195 |
| Colección: | Actas de congresos |
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