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http://hdl.handle.net/10553/46933
| Title: | Power model for DCFL family | Authors: | García, J. Hernández Ballester, Antonio Del Pino, J. Sendra, J. R. González, B. Nunez, A. |
UNESCO Clasification: | 3307 Tecnología electrónica | Keywords: | direct coupled FET logic field effect logic circuits JFET integrated circuits gallium arsenide power consumption, et al |
Issue Date: | 2002 | Publisher: | 0013-5194 | Journal: | Electronics letters | Abstract: | A model to estimate power consumption in GaAs direct coupled FET logic (DCFL) family, which is based on sensitivity computations, is reported. Comparisons against SPICE simulations show errors smaller than 5% in power consumption estimation, while CPU time is reduced by more than two orders of magnitude. | URI: | http://hdl.handle.net/10553/46933 | ISSN: | 0013-5194 | DOI: | 10.1049/el:20020027 | Source: | Electronics Letters[ISSN 0013-5194],v. 38, p. 13-14 |
| Appears in Collections: | Artículos |
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