Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/46921
Título: Influence of gate geometry in integrated MOS varactors on accumulation mode for RF
Autores/as: Amselem, E.
González, B. 
García, J. 
Aldea, I.
Marrero Martín, Margarita Luisa 
Iturri, A. G.
Del Pino, J. 
Khemchandani, S. L. 
Hernández Ballester, Antonio 
Clasificación UNESCO: 3307 Tecnología electrónica
Palabras clave: CMOS integrated circuits
MOS integrated circuits
radiofrequency integrated circuits
Varactors
Fecha de publicación: 2007
Publicación seriada: 2007 Spanish Conference on Electron Devices, Proceedings
Conferencia: 6th Spanish Conference on Electron Devices 
Resumen: Driven by the many applications that varactors have in RF integrated blocks, this work analyzes the influence of gate geometry (width and length) on integrated accumulation MOS varactors. For this purpose, a number of varactors have been designed and fabricated on a 0.8 mu m CMOS standard technology. The most relevant parameters: quality factor, tuning range, and capacitance, are simulated and compared against measurements. Some design considerations are reported.
URI: http://hdl.handle.net/10553/46921
ISBN: 978-1-4244-0868-9
DOI: 10.1109/SCED.2007.383997
Fuente: 2007 Spanish Conference on Electron Devices, Proceedings (4271170), p. 68-71
Colección:Actas de congresos
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