Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/46917
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | González, B. | en_US |
| dc.contributor.author | Iñiguez, B. | en_US |
| dc.contributor.author | Lazaro, A. | en_US |
| dc.contributor.author | Cerdeira, A. | en_US |
| dc.date.accessioned | 2018-11-23T09:23:50Z | - |
| dc.date.available | 2018-11-23T09:23:50Z | - |
| dc.date.issued | 2011 | en_US |
| dc.identifier.isbn | 9781424478637 | en_US |
| dc.identifier.uri | http://hdl.handle.net/10553/46917 | - |
| dc.description.abstract | DC numerical simulations of a Double-Gate (DG) MOSFET are performed including self-heating. Considering proper thermal conductivity, hydrodynamic model and optimizing pads, the resulting maximum lattice temperature of the transistor is 345 K, being located in channel layer, at the drain extension. | en_US |
| dc.language | eng | en_US |
| dc.source | Proceedings of the 8th Spanish Conference on Electron Devices, CDE'2011 (5744223) | en_US |
| dc.subject | 3307 Tecnología electrónica | en_US |
| dc.subject.other | Thermal conductivity | en_US |
| dc.subject.other | Thermal resistance | en_US |
| dc.subject.other | MOSFET circuits | en_US |
| dc.subject.other | Logic gates | en_US |
| dc.subject.other | Silicon | en_US |
| dc.subject.other | Temperature dependence | en_US |
| dc.subject.other | Conductivity | en_US |
| dc.title | DC thermal numerical simulation of DG MOSFET | en_US |
| dc.type | info:eu-repo/semantics/conferenceObject | en_US |
| dc.type | ConferenceObject | en_US |
| dc.relation.conference | 8th Spanish Conference on Electron Devices, CDE 2011 | |
| dc.identifier.doi | 10.1109/SCED.2011.5744223 | |
| dc.identifier.scopus | 79955733047 | - |
| dc.contributor.authorscopusid | 56082155300 | - |
| dc.contributor.authorscopusid | 55148428400 | - |
| dc.contributor.authorscopusid | 56036357200 | - |
| dc.contributor.authorscopusid | 7003780995 | - |
| dc.identifier.issue | 5744223 | - |
| dc.investigacion | Ingeniería y Arquitectura | en_US |
| dc.type2 | Actas de congresos | en_US |
| dc.utils.revision | Sí | en_US |
| dc.date.coverdate | Mayo 2011 | |
| dc.identifier.conferenceid | events121402 | |
| dc.identifier.ulpgc | Sí | es |
| item.grantfulltext | none | - |
| item.fulltext | Sin texto completo | - |
| crisitem.event.eventsstartdate | 08-02-2011 | - |
| crisitem.event.eventsenddate | 11-02-2011 | - |
| crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
| crisitem.author.dept | IU de Microelectrónica Aplicada | - |
| crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
| crisitem.author.orcid | 0000-0001-6864-9736 | - |
| crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
| crisitem.author.fullName | González Pérez, Benito | - |
| Appears in Collections: | Actas de congresos | |
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