Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/46914
DC FieldValueLanguage
dc.contributor.authorRoldán, J. B.en_US
dc.contributor.authorGonzález, B.en_US
dc.contributor.authorIñiguez, B.en_US
dc.contributor.authorRoldán, A. M.en_US
dc.contributor.authorLázaro, A.en_US
dc.contributor.authorCerdeira, A.en_US
dc.contributor.otherRoldan Aranda, Andres-
dc.contributor.otherLazaro, Antonio-
dc.contributor.otherGonzalez, Benito-
dc.contributor.otherRoldan Aranda, Juan Bautista-
dc.date.accessioned2018-11-23T09:22:27Z-
dc.date.available2018-11-23T09:22:27Z-
dc.date.issued2013en_US
dc.identifier.issn0038-1101en_US
dc.identifier.urihttp://hdl.handle.net/10553/46914-
dc.description.abstractSelf-heating effects (SHEs) in nanometric symmetrical double-gate MOSFETs (DGMOSFETs) have been analysed. An equivalent thermal circuit for the transistors has been developed to characterise thermal effects, where the temperature and thickness dependency of the thermal conductivity of the silicon and oxide layers within the devices has been included. The equivalent thermal circuit is consistent with simulations using a commercial technology computer-aided design (TCAD) tool (Sentaurus by Synopsys). In addition, a model for DGMOSFETs has been developed where SHEs have been considered in detail, taking into account the temperature dependence of the low-field mobility, saturation velocity, and inversion charge. The model correctly reproduces Sentaurus simulation data for the typical bias range used in integrated circuits. Lattice temperatures predicted by simulation are coherently reproduced by the model for varying silicon layer geometry.en_US
dc.languageengen_US
dc.publisher0038-1101-
dc.relation.ispartofSolid-State Electronicsen_US
dc.sourceSolid-State Electronics[ISSN 0038-1101],v. 79, p. 179-184en_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherDGMOSFETen_US
dc.subject.otherSelf-heating effectsen_US
dc.subject.otherThermal resistanceen_US
dc.subject.otherCompact modellingen_US
dc.titleIn-depth analysis and modelling of self-heating effects in nanometric DGMOSFETsen_US
dc.typeinfo:eu-repo/semantics/Articleen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.sse.2012.07.017
dc.identifier.scopus84869502884-
dc.identifier.isi000313611000034-
dcterms.isPartOfSolid-State Electronics-
dcterms.sourceSolid-State Electronics[ISSN 0038-1101],v. 79, p. 179-184-
dc.contributor.authorscopusid7006608138-
dc.contributor.authorscopusid56082155300-
dc.contributor.authorscopusid55148428400-
dc.contributor.authorscopusid35956786900-
dc.contributor.authorscopusid56036357200-
dc.contributor.authorscopusid7003780995-
dc.description.lastpage184en_US
dc.description.firstpage179en_US
dc.relation.volume79en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.identifier.wosWOS:000313611000034-
dc.contributor.daisngid294988-
dc.contributor.daisngid1092737-
dc.contributor.daisngid91160-
dc.contributor.daisngid2519161-
dc.contributor.daisngid56325-
dc.contributor.daisngid137230-
dc.identifier.investigatorRIDB-1850-2012-
dc.identifier.investigatorRIDJ-6076-2014-
dc.identifier.investigatorRIDH-6803-2015-
dc.identifier.investigatorRIDC-6844-2012-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Roldan, JB
dc.contributor.wosstandardWOS:Gonzalez, B
dc.contributor.wosstandardWOS:Iniguez, B
dc.contributor.wosstandardWOS:Roldan, AM
dc.contributor.wosstandardWOS:Lazaro, A
dc.contributor.wosstandardWOS:Cerdeira, A
dc.date.coverdateEnero 2013
dc.identifier.ulpgces
dc.description.sjr0,783
dc.description.jcr1,514
dc.description.sjrqQ1
dc.description.jcrqQ2
dc.description.scieSCIE
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptGIR IUMA: Tecnología Microelectrónica-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0001-6864-9736-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameGonzález Pérez, Benito-
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