Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/46807
DC FieldValueLanguage
dc.contributor.authorLazcano, R.-
dc.contributor.authorMadroñal, D.-
dc.contributor.authorFabelo, H.-
dc.contributor.authorOrtega, S.-
dc.contributor.authorSalvador, R.-
dc.contributor.authorCallico, G. M.-
dc.contributor.authorJuarez, E.-
dc.contributor.authorSanz, C.-
dc.date.accessioned2018-11-23T08:24:55Z-
dc.date.available2018-11-23T08:24:55Z-
dc.date.issued2018-
dc.identifier.issn1939-8018-
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/46807-
dc.description.abstractThis paper presents a study of the adaptation of a Non-Linear Iterative Partial Least Squares (NIPALS) algorithm applied to Hyperspectral Imaging to a Massively Parallel Processor Array manycore architecture, which assembles 256 cores distributed over 16 clusters. This work aims at optimizing the internal communications of the platform to achieve real-time processing of large data volumes with limited computational resources and memory bandwidth. As hyperspectral images are composed of extensive volumes of spectral information, real-time requirements, which are upper-bounded by the image capture rate of the hyperspectral sensor, are a challenging objective. To address this issue, the image size is usually reduced prior to the processing phase, which is itself a computationally intensive task. Consequently, this paper proposes an analysis of the intrinsic parallelism and the data dependency within the NIPALS algorithm and its subsequent implementation on a manycore architecture. Furthermore, this implementation has been validated against three hyperspectral images extracted from both remote sensing and medical datasets. As a result, an average speedup of 17× has been achieved when compared to the sequential version. Finally, this approach has been compared with other state-of-the-art implementations, outperforming them in terms of performance.-
dc.languageeng-
dc.publisher1939-8018-
dc.relation.ispartofJournal of Signal Processing Systems-
dc.sourceJournal of Signal Processing Systems[ISSN 1939-8018], p. 1-13-
dc.subject3307 Tecnología electrónica-
dc.subject.otherHyperspectral imaging-
dc.subject.otherMassively parallel processing-
dc.subject.otherReal-time processing-
dc.subject.otherParallel programming-
dc.subject.otherNIPALS-PCA-
dc.titleAdaptation of an Iterative PCA to a Manycore Architecture for Hyperspectral Image Processing-
dc.typeinfo:eu-repo/semantics/Article-
dc.typeArticle-
dc.identifier.doi10.1007/s11265-018-1380-9-
dc.identifier.scopus85047148311-
dc.identifier.isi000472084000005-
dc.contributor.authorscopusid57192839213-
dc.contributor.authorscopusid57192829417-
dc.contributor.authorscopusid56405568500-
dc.contributor.authorscopusid57189334144-
dc.contributor.authorscopusid23005852100-
dc.contributor.authorscopusid56006321500-
dc.contributor.authorscopusid36447485600-
dc.contributor.authorscopusid7006751614-
dc.identifier.eissn1939-8115-
dc.description.lastpage771-
dc.identifier.issue7-
dc.description.firstpage759-
dc.relation.volume91-
dc.investigacionIngeniería y Arquitectura-
dc.type2Artículo-
dc.contributor.daisngid3634522-
dc.contributor.daisngid3360488-
dc.contributor.daisngid2096372-
dc.contributor.daisngid1812298-
dc.contributor.daisngid29956157-
dc.contributor.daisngid506422-
dc.contributor.daisngid30553003-
dc.contributor.daisngid384271-
dc.description.numberofpages13-
dc.utils.revision-
dc.contributor.wosstandardWOS:Lazcano, R-
dc.contributor.wosstandardWOS:Madronal, D-
dc.contributor.wosstandardWOS:Fabelo, H-
dc.contributor.wosstandardWOS:Ortega, S-
dc.contributor.wosstandardWOS:Salvador, R-
dc.contributor.wosstandardWOS:Callico, GM-
dc.contributor.wosstandardWOS:Juarez, E-
dc.contributor.wosstandardWOS:Sanz, C-
dc.date.coverdateJulio 2019-
dc.identifier.ulpgces
dc.description.sjr0,203
dc.description.jcr1,035
dc.description.sjrqQ3
dc.description.jcrqQ4
dc.description.scieSCIE
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-9794-490X-
crisitem.author.orcid0000-0002-7519-954X-
crisitem.author.orcid0000-0002-3784-5504-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameFabelo Gómez, Himar Antonio-
crisitem.author.fullNameOrtega Sarmiento,Samuel-
crisitem.author.fullNameMarrero Callicó, Gustavo Iván-
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