Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45370
Title: A low power voltage limiter for a full passive UHF RFID sensor on a 0.35 μm CMOS process
Authors: Fernández, E.
Beriain, A.
Solar, H.
Rebollo, I.
García-Alonso, A.
Sosa, J. 
Monzón, J. M. 
Garcia-Alonso, Santiago 
Montiel-Nelson, J. A. 
Berenguer, R.
UNESCO Clasification: 330790 Microelectrónica
Keywords: Voltage limiter
RFID sensor
CMOS
Issue Date: 2012
Journal: Microelectronics 
Conference: IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) 
Abstract: This paper presents a low power voltage limiter design for avoiding possible damages in the analog front-end of a RFID sensor due to voltage surges whenever readers and tags are close. The proposed voltage limiter design takes advantage of the implemented bandgap reference and voltage regulator blocks in order to provide low deviation of the limiting voltage due to temperature variation and process dispersion. The measured limiting voltage is 2.9 V with a voltage deviation of only ±0.065 V for the 12 measured dies. The measured current consumption is only 150 nA when the reader and the tag are far away, not limiting the sensitivity of the tag due to an undesired consumption in the voltage limiter. The circuit is implemented on a low cost 2P4M 0.35 μm CMOS technology.
URI: http://hdl.handle.net/10553/45370
ISSN: 0026-2692
DOI: 10.1016/j.mejo.2012.03.013
Source: Microelectronics [ISSN 0026-2692], v. 43 (10), p. 708-713, (Octubre 2012)
Appears in Collections:Actas de congresos
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