Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/45059
Título: 0.25-μm technology arithmetic codec for mobile multimedia communicators
Autores/as: Álvarez, Alberto
López, Sebastián 
López, José Fco 
Sarmiento, Roberto 
Clasificación UNESCO: 3307 Tecnología electrónica
Palabras clave: Image compression
Image coding
Digital image storage
Fecha de publicación: 2003
Editor/a: 0277-786X
Publicación seriada: Proceedings of SPIE - The International Society for Optical Engineering 
Conferencia: VLSI Circuits and Systems 
Resumen: Low power dissipation is a must when dealing with mobile devices due to the influence related to its weight and hence, its portability. In this paper, the implementation of a 0.25 μm technology arithmetic codec with a good power/area/performance trade-off is presented. One of the key aspects introduced in order to obtain good performance is the fact of using low precision arithmetic rather than full precision, alowing the elimination of multiplications and divisions needed in order to process symbols and coefficients. These operations are replaced by shift/add operations, minimizing the complexity of the algorithm and improving the encoding and decoding process. The chip has been described in a high level language, ensuring its portability to other technologies. The implementation gives as result a 25 mm2 chip, pads included, with a total power dissipation of 300 mW and a frequency of operation of 10 MHz.
URI: http://hdl.handle.net/10553/45059
ISBN: 0-8194-4977-6
ISSN: 0277-786X
DOI: 10.1117/12.499051
Fuente: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 361-369
Colección:Actas de congresos
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