Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/45059
Title: 0.25-μm technology arithmetic codec for mobile multimedia communicators
Authors: Álvarez, Alberto
López, Sebastián 
López, José Fco 
Sarmiento, Roberto 
UNESCO Clasification: 3307 Tecnología electrónica
Keywords: Image compression
Image coding
Digital image storage
Issue Date: 2003
Publisher: 0277-786X
Journal: Proceedings of SPIE - The International Society for Optical Engineering 
Conference: VLSI Circuits and Systems 
Abstract: Low power dissipation is a must when dealing with mobile devices due to the influence related to its weight and hence, its portability. In this paper, the implementation of a 0.25 μm technology arithmetic codec with a good power/area/performance trade-off is presented. One of the key aspects introduced in order to obtain good performance is the fact of using low precision arithmetic rather than full precision, alowing the elimination of multiplications and divisions needed in order to process symbols and coefficients. These operations are replaced by shift/add operations, minimizing the complexity of the algorithm and improving the encoding and decoding process. The chip has been described in a high level language, ensuring its portability to other technologies. The implementation gives as result a 25 mm2 chip, pads included, with a total power dissipation of 300 mW and a frequency of operation of 10 MHz.
URI: http://hdl.handle.net/10553/45059
ISBN: 0-8194-4977-6
ISSN: 0277-786X
DOI: 10.1117/12.499051
Source: Proceedings of SPIE - The International Society for Optical Engineering[ISSN 0277-786X],v. 5117, p. 361-369
Appears in Collections:Actas de congresos
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