Control System Design Methodology for SoC FPGA

Abstract

This paper proposes a methodology to design a control system for SoC FPGA. The design flow is done with MATLAB/Simulink and Vivado Design Suite tools. This methodology consists of three key steps: Model-in-the-Loop (MIL), Software-in-the-Loop (SIL), and SoC-in-the-Loop (SCIL). An implementation of a Dynamic Photovoltaic Array Reconfiguration algorithm, together with a Maximum Power Point Tracker controller can validate the proposed design methodology. The controller will maximise the power output of a photovoltaic array under partial shading conditions. The designed control system is prototyped on the ZedBoard development board. The verification of the system implemented on the ZedBoard is carried out in conjunction with the system model in Simulink. The implemented system has a relatively low resource utilization and power consumption.