Please use this identifier to cite or link to this item: https://accedacris.ulpgc.es/handle/10553/114892
DC FieldValueLanguage
dc.contributor.authorDíaz, María-
dc.contributor.authorGuerra, Raúl-
dc.contributor.authorLópez, Sebastián-
dc.contributor.authorCaba, Julián-
dc.contributor.authorBarba, Jesús-
dc.date.accessioned2022-05-31T09:05:19Z-
dc.date.available2022-05-31T09:05:19Z-
dc.date.issued2021-
dc.identifier.isbn978-1-6654-0369-6-
dc.identifier.issn2153-6996-
dc.identifier.otherScopus-
dc.identifier.urihttps://accedacris.ulpgc.es/handle/10553/114892-
dc.description.abstractRemote sensing has gained relevance in the last years, mainly due to the emergence of UAVs carrying airborne imagery sensors. In this regard, the on-board data processing for on-the-fly making-decision applications is also gaining momentum. Nevertheless, these flight vehicles are still limited in terms of power budget and computational capacity, which hampers the handling of the hyperspectral data. Consequently, there is an emerging trend towards the development of more hardware-friendly algorithms suitable for an efficient implementation in parallel computing devices. In this sense, the LbL-FAD algorithm arose in response to the lack of causal anomaly detectors that could be easily integrated in push-broom-based acquisition systems. In this work, we have analysed the feasibility of the performance and power needs of the LbL-FAD algorithm in a mid-range re-configurable FPGA-SoC such as the XC7Z020 chip. Concretely, a highly optimized FPGA accelerator of the LbL-FAD method has been described for the line-by-line detection of anomalous spectra.-
dc.languageeng-
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)-
dc.relation.ispartof2021 Ieee International Geoscience And Remote Sensing Symposium Igarss-
dc.source2021 IEEE International Geoscience and Remote Sensing Symposium IGARSS, p. 1579-1582, (Enero 2021)-
dc.subject3307 Tecnología electrónica-
dc.subject.otherAnomaly Detection-
dc.subject.otherFpgas-
dc.subject.otherHigh-Level Synthesis-
dc.subject.otherHyperspectral Imaging-
dc.subject.otherLine-By-Line Performance-
dc.subject.otherLow-Power-
dc.subject.otherReal-Time-
dc.titleAn FPGA Based Implementation of a Hyperspectral Anomaly Detection Algorithm for Real-Time Applications-
dc.typeinfo:eu-repo/semantics/conferenceObject-
dc.typeConferenceObject-
dc.relation.conference2021 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2021-
dc.identifier.doi10.1109/IGARSS47720.2021.9554801-
dc.identifier.scopus85129861862-
dc.identifier.isi001250139801212-
dc.contributor.orcidNO DATA-
dc.contributor.orcidNO DATA-
dc.contributor.orcidNO DATA-
dc.contributor.orcidNO DATA-
dc.contributor.orcidNO DATA-
dc.contributor.authorscopusid57192832495-
dc.contributor.authorscopusid56333613300-
dc.contributor.authorscopusid57187722000-
dc.contributor.authorscopusid55961635100-
dc.contributor.authorscopusid13006950500-
dc.description.lastpage1582-
dc.description.firstpage1579-
dc.investigacionIngeniería y Arquitectura-
dc.type2Actas de congresos-
dc.contributor.daisngid47859142-
dc.contributor.daisngid919642-
dc.contributor.daisngid72247442-
dc.contributor.daisngid71922231-
dc.contributor.daisngid71841589-
dc.description.numberofpages4-
dc.utils.revision-
dc.contributor.wosstandardWOS:Díaz, M-
dc.contributor.wosstandardWOS:Caba, J-
dc.contributor.wosstandardWOS:Guerra, R-
dc.contributor.wosstandardWOS:Barba, J-
dc.contributor.wosstandardWOS:Loóez, S-
dc.date.coverdateEnero 2021-
dc.identifier.conferenceidevents148972-
dc.identifier.ulpgc-
dc.contributor.buulpgcBU-TEL-
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate28-09-2006-
crisitem.event.eventsenddate30-09-2006-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0003-2670-8149-
crisitem.author.orcid0000-0002-4303-3051-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameDíaz Martín, María-
crisitem.author.fullNameGuerra Hernández, Raúl Celestino-
crisitem.author.fullNameLópez Suárez, Sebastián Miguel-
Appears in Collections:Actas de congresos
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