Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/112649
Campo DC | Valor | idioma |
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dc.contributor.author | Barrios Alfaro, Yubal | en_US |
dc.contributor.author | Sánchez, Antonio | en_US |
dc.contributor.author | Guerra, Raúl | en_US |
dc.contributor.author | Sarmiento, Roberto | en_US |
dc.date.accessioned | 2021-11-15T09:50:26Z | - |
dc.date.available | 2021-11-15T09:50:26Z | - |
dc.date.issued | 2021 | en_US |
dc.identifier.issn | 2072-4292 | en_US |
dc.identifier.other | Scopus | - |
dc.identifier.uri | http://hdl.handle.net/10553/112649 | - |
dc.description.abstract | The increment in the use of high-resolution imaging sensors on-board satellites motivates the use of on-board image compression, mainly due to restrictions in terms of both hardware (computational and storage resources) and downlink bandwidth with the ground. This work presents a compression solution based on the CCSDS 123.0-B-2 near-lossless compression standard for multi-and hyperspectral images, which deals with the high amount of data acquired by these next-generation sensors. The proposed approach has been developed following an HLS design methodology, accelerating design time and obtaining good system performance. The compressor is comprised by two main stages, a predictor and a hybrid encoder, designed in Band-Interleaved by Line (BIL) order and optimized to achieve a trade-off between throughput and logic resources utilization. This solution has been mapped on a Xilinx Kintex UltraScale XCKU040 FPGA and targeting AVIRIS images, reaching a throughput of 12.5 MSamples/s and consuming only the 7% of LUTs and around the 14% of dedicated memory blocks available in the device. To the best of our knowledge, this is the first fully-compliant hardware implementation of the CCSDS 123.0-B-2 near-lossless compression standard available in the state of the art. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | Remote Sensing | en_US |
dc.source | Remote Sensing [EISSN 2072-4292], v. 13 (21), 4388, (Noviembre 2021) | en_US |
dc.subject | 330790 Microelectrónica | en_US |
dc.subject.other | CCSDS | en_US |
dc.subject.other | Compression Algorithms | en_US |
dc.subject.other | FPGA | en_US |
dc.subject.other | Hardware Implementations | en_US |
dc.subject.other | Hyperspectral Imaging | en_US |
dc.subject.other | On-Board Data Processing | en_US |
dc.subject.other | Space Missions | en_US |
dc.title | Hardware implementation of the ccsds 123.0-b-2 near-lossless compression standard following an hls design methodology | en_US |
dc.type | info:eu-repo/semantics/Article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.3390/rs13214388 | en_US |
dc.identifier.scopus | 85118502785 | - |
dc.contributor.orcid | NO DATA | - |
dc.contributor.orcid | NO DATA | - |
dc.contributor.orcid | NO DATA | - |
dc.contributor.orcid | NO DATA | - |
dc.contributor.authorscopusid | 57201297173 | - |
dc.contributor.authorscopusid | 57211429595 | - |
dc.contributor.authorscopusid | 56333613300 | - |
dc.contributor.authorscopusid | 35609452100 | - |
dc.identifier.eissn | 2072-4292 | - |
dc.identifier.issue | 21 | - |
dc.relation.volume | 13 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.description.notas | This article belongs to the Section Remote Sensing Image Processing | en_US |
dc.utils.revision | Sí | en_US |
dc.date.coverdate | Noviembre 2021 | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.description.sjr | 1,283 | |
dc.description.jcr | 5,349 | |
dc.description.sjrq | Q1 | |
dc.description.jcrq | Q1 | |
dc.description.scie | SCIE | |
dc.description.miaricds | 10,6 | |
item.fulltext | Con texto completo | - |
item.grantfulltext | open | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0001-6186-9971 | - |
crisitem.author.orcid | 0000-0002-2142-7885 | - |
crisitem.author.orcid | 0000-0002-4303-3051 | - |
crisitem.author.orcid | 0000-0002-4843-0507 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Barrios Alfaro,Yubal | - |
crisitem.author.fullName | Sánchez Clemente, Antonio José | - |
crisitem.author.fullName | Guerra Hernández,Raúl Celestino | - |
crisitem.author.fullName | Sarmiento Rodríguez, Roberto | - |
Colección: | Artículos |
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