Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/112649
Title: Hardware implementation of the ccsds 123.0-b-2 near-lossless compression standard following an hls design methodology
Authors: Barrios Alfaro, Yubal 
Sánchez, Antonio 
Guerra, Raúl 
Sarmiento, Roberto 
UNESCO Clasification: 330790 Microelectrónica
Keywords: CCSDS
Compression Algorithms
FPGA
Hardware Implementations
Hyperspectral Imaging, et al
Issue Date: 2021
Journal: Remote Sensing 
Abstract: The increment in the use of high-resolution imaging sensors on-board satellites motivates the use of on-board image compression, mainly due to restrictions in terms of both hardware (computational and storage resources) and downlink bandwidth with the ground. This work presents a compression solution based on the CCSDS 123.0-B-2 near-lossless compression standard for multi-and hyperspectral images, which deals with the high amount of data acquired by these next-generation sensors. The proposed approach has been developed following an HLS design methodology, accelerating design time and obtaining good system performance. The compressor is comprised by two main stages, a predictor and a hybrid encoder, designed in Band-Interleaved by Line (BIL) order and optimized to achieve a trade-off between throughput and logic resources utilization. This solution has been mapped on a Xilinx Kintex UltraScale XCKU040 FPGA and targeting AVIRIS images, reaching a throughput of 12.5 MSamples/s and consuming only the 7% of LUTs and around the 14% of dedicated memory blocks available in the device. To the best of our knowledge, this is the first fully-compliant hardware implementation of the CCSDS 123.0-B-2 near-lossless compression standard available in the state of the art.
URI: http://hdl.handle.net/10553/112649
ISSN: 2072-4292
DOI: 10.3390/rs13214388
Source: Remote Sensing [EISSN 2072-4292], v. 13 (21), 4388, (Noviembre 2021)
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