Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/111099
Título: | Design Methodology of a Fully Parallelized Neural Network on a FPGA | Autores/as: | Pérez Suárez, Santiago Tomás Robaina, Carlos Osorio Vásquez Núñez, José L. Alonso Hernández, Jesús Bernardino Travieso González, Carlos Manuel |
Clasificación UNESCO: | 3307 Tecnología electrónica | Palabras clave: | Neural Network FPGA Floating point Fixed point Matlab, et al. |
Fecha de publicación: | 2014 | Editor/a: | WSEAS Press | Publicación seriada: | Recent advances in electrical engineering | Conferencia: | 8th International Conference on Circuits, Systems, Signal and Telecommunications (CSST 2014) | Resumen: | In this work a methodology of a parallelized neural network has been designed. It explains a way to design a Neural Network using Mathworks and Xilinx Tools. Initially, the floating point algorithm was evaluated using MatlabNeural Network Toolbox. Afterwards, the fixed point algorithm was designed on a Field Programmable Gate Array (FPGA).The architecture was fully parallelized. The design tool used is System Generator of Xilinx, which works over Simulink. Finally the System Generator design is compiled for Xilinx Integrated System Environment (ISE). | URI: | http://hdl.handle.net/10553/111099 | ISBN: | 978-960-474-359-9 | ISSN: | 1790-5117 | Fuente: | Proceedings of the 8th WSEAS International Conference on Circuits, Systems, Signal and Telecommunications (CSST 2014) |
Colección: | Actas de congresos |
Los elementos en ULPGC accedaCRIS están protegidos por derechos de autor con todos los derechos reservados, a menos que se indique lo contrario.