Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/70106
Título: Current mirror based low voltage single supply CMOS level up-shifter
Autores/as: García Montesdeoca, José Carlos 
Montiel Nelson, Juan Antonio 
Nooshabadi, Saeid
Clasificación UNESCO: 3307 Tecnología electrónica
Fecha de publicación: 2019
Publicación seriada: Midwest Symposium on Circuits and Systems 
Conferencia: 62nd International Midwest Symposium on Circuits and Systems 
Resumen: A current mirror based low voltage single supply CMOS level up-shifter (fcm-ls) for upconverting signals from 0.4 to 0.8V power supply domain is presented in this work. Based on the post-layout simulation, fcm-ls provides 48.5% lower energy consumption and 29.7% better speed than a similar circuit topology (vl-ls). Both circuits are implemented in 65nm CMOS process and use low threshold voltage transistors. With a power supply voltage of 0.8V, and an input voltage range of 0.4V, we obtain up to 63.4% energy-delay-product (EDP) improvement at 500MHz frequency and 590fF output loading, over reference circuit [1]. Active area is optimized to achieve low static and dynamic energy consumption at the maximum load capacitance. The limits of proposed circuit are verified using the post-layout simulation results.
URI: http://hdl.handle.net/10553/70106
ISBN: 9781728127880
ISSN: 1548-3746
DOI: 10.1109/MWSCAS.2019.8884885
Fuente: Midwest Symposium on Circuits and Systems [ISSN 1548-3746],v. 2019-August, p. 1-4
Colección:Actas de congresos
Vista completa

Citas SCOPUSTM   

2
actualizado el 15-dic-2024

Visitas

105
actualizado el 21-dic-2024

Google ScholarTM

Verifica

Altmetric


Comparte



Exporta metadatos



Los elementos en ULPGC accedaCRIS están protegidos por derechos de autor con todos los derechos reservados, a menos que se indique lo contrario.