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Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/72726
DC FieldValueLanguage
dc.contributor.authorCazorla, FJen_US
dc.contributor.authorRamirez, Aen_US
dc.contributor.authorValero, Men_US
dc.contributor.authorKnijnenburg, PMWen_US
dc.contributor.authorSakellariou, Ren_US
dc.contributor.authorFernández, E.en_US
dc.date.accessioned2020-05-21T21:28:40Z-
dc.date.available2020-05-21T21:28:40Z-
dc.date.issued2004en_US
dc.identifier.issn0272-1732en_US
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/72726-
dc.description.abstractAlthough simultaneous multithreading processors provide a good cost-performance tradeoff, they exhibit unpredictable performance in real-time applications. We present a resource management scheme that eliminates a major cause of performance unpredictability in SMTs, making them suitable for many types of embedded systems.en_US
dc.languageengen_US
dc.relation.ispartofIEEE Microen_US
dc.sourceIeee Micro [ISSN 0272-1732], v. 24 (4), p. 24-31, (Julio-Agosto 2004)en_US
dc.subject3304 Tecnología de los ordenadoresen_US
dc.subject330412 Dispositivos de controlen_US
dc.titleQoS for high-performance smt processors in embedded systemsen_US
dc.typeinfo:eu-repo/semantics/Articleen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/MM.2004.37en_US
dc.identifier.scopus4644223464-
dc.identifier.isi000223481000005-
dc.contributor.authorscopusid55129883300-
dc.contributor.authorscopusid7401734996-
dc.contributor.authorscopusid24475914200-
dc.contributor.authorscopusid6603587864-
dc.contributor.authorscopusid6701361478-
dc.contributor.authorscopusid36476145100-
dc.identifier.eissn1937-4143-
dc.description.lastpage31en_US
dc.identifier.issue4-
dc.description.firstpage24en_US
dc.relation.volume24en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Artículoen_US
dc.contributor.daisngid268834-
dc.contributor.daisngid440299-
dc.contributor.daisngid41870-
dc.contributor.daisngid1769309-
dc.contributor.daisngid393539-
dc.contributor.daisngid6404672-
dc.description.numberofpages8en_US
dc.utils.revisionSíen_US
dc.contributor.wosstandardWOS:Cazorla, FJ-
dc.contributor.wosstandardWOS:Ramirez, A-
dc.contributor.wosstandardWOS:Valero, M-
dc.contributor.wosstandardWOS:Knijnenburg, PMW-
dc.contributor.wosstandardWOS:Sakellariou, R-
dc.contributor.wosstandardWOS:Fernandez, E-
dc.date.coverdateJulio 2004en_US
dc.identifier.ulpgcSíes
dc.description.jcr1,19
dc.description.jcrqQ1
dc.description.scieSCIE
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.author.deptDepartamento de Informática y Sistemas-
crisitem.author.fullNameFernández García, Enrique-
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