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Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/69797
DC FieldValueLanguage
dc.contributor.authorOramas-Piero, Carlosen_US
dc.contributor.authorVega-Fuentes, Eduardoen_US
dc.contributor.authorDeniz, Fabianen_US
dc.date.accessioned2020-02-05T12:50:07Z-
dc.date.available2020-02-05T12:50:07Z-
dc.date.issued2018en_US
dc.identifier.isbn9788887237405en_US
dc.identifier.otherScopus-
dc.identifier.otherWoS-
dc.identifier.urihttp://hdl.handle.net/10553/69797-
dc.description.abstractThere always exist unbalance in low voltage networks. It has adverse effects like current increase and voltage drops below regulatory limits in the most loaded phase, presence of current in the neutral conductor, over-voltage problems in the least loaded phase, and feeder tripping due to neutral overcurrent. Classic solutions involve grid reinforcements. In this paper a control methodology that may be applied to any unbalanced network is proposed. A real unbalanced low voltage network was modeled and simulated with OpenDSS and Matlab. The proposed control based on genetic algorithm found the least number of phase swaps required to restore voltage violations. It resulted in percentage voltage unbalance factor improvement and 18% losses reduction.en_US
dc.languageengen_US
dc.relation.ispartof2018 110Th Aeit International Annual Conference, Aeit 2018en_US
dc.source2018 110th AEIT International Annual Conference, AEIT 2018en_US
dc.subject3306 Ingeniería y tecnología eléctricasen_US
dc.subject120601 Construcción de algoritmosen_US
dc.subject.otherGenetic Algorithmen_US
dc.subject.otherLow Voltage Networksen_US
dc.subject.otherVoltage Unbalanceen_US
dc.titleGenetic algorithm based control for unbalanced low voltage networksen_US
dc.typeinfo:eu-repo/semantics/conferenceObjecten_US
dc.typeConferenceObjecten_US
dc.relation.conference110th AEIT International Annual Conferenceen_US
dc.relation.conference110th AEIT International Annual Conference, AEIT 2018
dc.identifier.doi10.23919/AEIT.2018.8577460en_US
dc.identifier.scopus85060312202-
dc.identifier.isi000462183200128-
dc.contributor.authorscopusid57205501706-
dc.contributor.authorscopusid56486013300-
dc.contributor.authorscopusid6508208989-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.contributor.daisngid29897266-
dc.contributor.daisngid29888065-
dc.contributor.daisngid6063272-
dc.description.numberofpages4en_US
dc.identifier.eisbn978-8-8872-3740-5-
dc.utils.revisionSíen_US
dc.contributor.wosstandardWOS:Oramas-Pinero, C-
dc.contributor.wosstandardWOS:Vega-Fuentes, E-
dc.contributor.wosstandardWOS:Deniz, F-
dc.date.coverdate2018en_US
dc.identifier.conferenceidevents121147-
dc.identifier.ulpgcSíes
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.event.eventsstartdate03-10-2018-
crisitem.event.eventsstartdate03-10-2018-
crisitem.event.eventsenddate05-10-2018-
crisitem.event.eventsenddate05-10-2018-
crisitem.author.deptGIR IUMA: Sistemas de Información y Comunicaciones-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Eléctrica-
crisitem.author.deptGIR SIANI: Computación Evolutiva y Aplicaciones-
crisitem.author.deptIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.deptDepartamento de Ingeniería Eléctrica-
crisitem.author.orcid0000-0002-9194-5119-
crisitem.author.orcid0000-0002-5356-4796-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU Sistemas Inteligentes y Aplicaciones Numéricas-
crisitem.author.fullNameVega Fuentes, Eduardo-
crisitem.author.fullNameDéniz Quintana, Fabian Alberto-
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