DC gate leakage current model accounting for trapping effects in AlGaN/GaN HEMTs

Abstract

A DC leakage current model accounting for trapping effects under the gate of AlGaN/GaN HEMTs on silicon has been developed. Based on TCAD numerical simulations (with Sentaurus Device), non-local tunneling under the Schottky gate is necessary to reproduce the measured transfer characteristics in a subthreshold regime. Once the trap concentration and distribution are determined in the device, the resulting gate leakage current is modeled making use of Verilog-A, for typical operation regimes.