Please use this identifier to cite or link to this item:
http://hdl.handle.net/10553/55434
DC Field | Value | Language |
---|---|---|
dc.contributor.author | San Miguel Montesdeoca, Mario | en_US |
dc.contributor.author | Mateos Angulo, Sergio | en_US |
dc.contributor.author | Mayor Duarte, Daniel | en_US |
dc.contributor.author | Khemchandani, S. L. | en_US |
dc.contributor.author | Del Pino, J. | en_US |
dc.date.accessioned | 2019-05-20T09:00:56Z | - |
dc.date.available | 2019-05-20T09:00:56Z | - |
dc.date.issued | 2018 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/55434 | - |
dc.description.abstract | This paper analyses the effects of single-event transients (SETs) on CMOS low noise amplifiers (LNA) designed for a 0.18 mm technology. Two well-known topologies, the common-source and common-gate cascodes, have been analysed when heavy ions strike the most sensitive nodes of these structures. In order to simulate these strikes both a physics-based technology computer aided design (TCAD) tool and an electrical circuit domain simulator have been used. This way the physics information given by the TCAD tool is combined with the fast transient simulations performed in circuit simulators. To study their SET performance, the maximum voltage peak and the recovery time of the output signal were calculated for both LNAs. Additionally, a safe operating area can be defined, setting the boundaries for acceptable SETs. Radiation hardening by design techniques have been applied at the most vulnerable nodes of both LNAs. The proposed mitigation approaches make both LNAs hardened against radiation, considerably improving their SET performance. | en_US |
dc.language | eng | en_US |
dc.source | Workshop on Compound Semiconductor Devices and Integrated Circuits 2017 (WOCSDICE 2017) | en_US |
dc.subject | 33 Ciencias tecnológicas | en_US |
dc.title | SET analysis and radiation hardening approaches for different LNA topologies | en_US |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.type | ConferenceObject | es |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Actas de congresos | en_US |
dc.identifier.ulpgc | Sí | es |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-0087-2370 | - |
crisitem.author.orcid | 0000-0003-2610-883X | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Khemchandani Lalchand, Sunil | - |
crisitem.author.fullName | Del Pino Suárez, Francisco Javier | - |
Appears in Collections: | Actas de congresos |
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