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Please use this identifier to cite or link to this item: https://accedacris.ulpgc.es/jspui/handle/10553/52224
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dc.contributor.authorCelinski, P.
dc.contributor.authorLópez, J. F.
dc.contributor.authorAl-Sarawi, S.
dc.contributor.authorAbbott, D.
dc.date.accessioned2018-11-25T18:29:15Z-
dc.date.available2018-11-25T18:29:15Z-
dc.date.issued2002
dc.identifier.issn0013-5194
dc.identifier.urihttps://accedacris.ulpgc.es/handle/10553/52224-
dc.publisher0013-5194
dc.relation.ispartofElectronics letters
dc.sourceElectronics Letters[ISSN 0013-5194],v. 38, p. 633-635
dc.titleCompact parallel (m,n) counters based on self-timed threshold logic
dc.typeinfo:eu-repo/semantics/articlees
dc.typeArticlees
dc.identifier.doi10.1049/el:20020438
dc.identifier.scopus0037142559
dc.contributor.authorscopusid6701421283
dc.contributor.authorscopusid7404444793
dc.contributor.authorscopusid7004170747
dc.contributor.authorscopusid56053895400
dc.description.lastpage635
dc.description.firstpage633
dc.relation.volume38
dc.type2Artículoes
dc.identifier.ulpgcSíes
dc.description.sjr1,542
dc.description.sjrqQ1
dc.description.scieSCIE
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-6304-2801-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameLópez Feliciano, José Francisco-
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